Re: [PATCH v2 3/3] Mutex: Optimize adaptive spin algorithm

[kemi <kemi dot wang at intel dot com>]

On 2018年05月08日 23:08, Florian Weimer wrote:
> On 05/02/2018 01:04 PM, kemi wrote:
>>
>>
>> On 2018年05月02日 16:19, Florian Weimer wrote:
>>> On 04/25/2018 04:56 AM, Kemi Wang wrote:
>>>> @@ -124,21 +125,24 @@ __pthread_mutex_lock (pthread_mutex_t *mutex)
>>>>          if (LLL_MUTEX_TRYLOCK (mutex) != 0)
>>>>        {
>>>>          int cnt = 0;
>>> …
>>>> +      int max_cnt = MIN (__mutex_aconf.spin_count,
>>>> +            mutex->__data.__spins * 2 + 100);
>>>> +
>>>> +      /* MO read while spinning */
>>>> +      do
>>>> +        {
>>>> +         atomic_spin_nop ();
>>>> +        }
>>>> +      while (atomic_load_relaxed (&mutex->__data.__lock) != 0 &&
>>>> +            ++cnt < max_cnt);
>>>> +        /* Try to acquire the lock if lock is available or the spin count
>>>> +         * is run out, call into kernel to block if fails
>>>> +         */
>>>> +      if (LLL_MUTEX_TRYLOCK (mutex) != 0)
>>>> +        LLL_MUTEX_LOCK (mutex);
>>>>    
>>> …
>>>> +      mutex->__data.__spins += (cnt - mutex->__data.__spins) / 8;
>>>> +    }
>>>
>>> The indentation is off.  Comments should end with a ”.  ” (dot and two spaces).  Multi-line comments do not start with “*” on subsequent lines.  We don't use braces when we can avoid them.  Operators such as “&&” should be on the following line when breaking up lines.
>>>
>>
>> Will fold these changes in next version.
>> I am not familiar with glibc coding style, apologize for that.
> 
> No apology needed, it takes some time to get use to.
> 
>>> Why is the LLL_MUTEX_TRYLOCK call still needed?  Shouldn't be an unconditional call to LLL_MUTEX_LOCK be sufficient?
>>>
>>
>> The purpose of calling LLL_MUTEX_TRYLOCK here is to try to acquire the lock at user
>> space without block when we observed the lock is available. Thus, in case of multiple
>> spinners contending for the lock,  only one spinner can acquire the lock successfully
>> and others fall into block.
>>
>> I am not sure an unconditional call to LLL_MUTEX_LOCK as you mentioned here can satisfy
>> this purpose.
> 
> It's what we use for the default case.  It expands to lll_lock, so it should try atomic_compare_and_exchange_bool_acq first and only perform a futex syscall in case there is contention.  So I do think that LLL_MUTEX_TRYLOCK is redundant here.  Perhaps manually review the disassembly to make sure?
> 

Make sense. I think you are right.

78            /* Normal mutex.  */
   0x00007ffff7989b20 <+80>:    and    $0x80,%edx
   0x00007ffff7989b26 <+86>:    mov    $0x1,%edi
   0x00007ffff7989b2b <+91>:    xor    %eax,%eax
   0x00007ffff7989b2d <+93>:    mov    %edx,%esi
   *0x00007ffff7989b2f <+95>:    lock cmpxchg %edi,(%r8)*
   *0x00007ffff7989b34 <+100>:   je     0x7ffff7989b4c <__GI___pthread_mutex_lock+124>*
   0x00007ffff7989b36 <+102>:   lea    (%r8),%rdi
   0x00007ffff7989b39 <+105>:   sub    $0x80,%rsp
   0x00007ffff7989b40 <+112>:   callq  0x7ffff7990830 <__lll_lock_wait>
   0x00007ffff7989b45 <+117>:   add    $0x80,%rsp

79            LLL_MUTEX_LOCK (mutex);
   0x00007ffff7989b4c <+124>:   mov    0x8(%r8),%edx
   0x00007ffff7989b50 <+128>:   test   %edx,%edx
   0x00007ffff7989b52 <+130>:   jne    0x7ffff7989cc9 <__GI___pthread_mutex_lock+505>
   0x00007ffff7989cc9 <+505>:   lea    0xa090(%rip),%rcx        # 0x7ffff7993d60 <__PRETTY_FUNCTION__.8768>
   0x00007ffff7989cd0 <+512>:   lea    0x9f05(%rip),%rsi        # 0x7ffff7993bdc
   0x00007ffff7989cd7 <+519>:   lea    0x9f1b(%rip),%rdi        # 0x7ffff7993bf9
   0x00007ffff7989cde <+526>:   mov    $0x4f,%edx
   0x00007ffff7989ce3 <+531>:   callq  0x7ffff7985840 <__assert_fail@plt>

80            assert (mutex->__data.__owner == 0);


>>
>>> But the real question is if the old way of doing CAS in a loop is beneficial on other, non-Intel architectures.  You either need get broad consensus from the large SMP architectures (various aarch64 implementations, IBM POWER and Z), or somehow make this opt-in at the source level.
>>>
>>
>> That would be a platform-specific change and have obvious performance improvement for x86 architecture.
>> And according to Adhemerval, this change could also have some improvement for arrch64 architecture.
>> If you or someone else still have some concern of performance regression on other architecture, making
>> this opt-in could eliminate people's worries.
>>
>> "
>> I checked the change on a 64 cores aarch64 machine, but
>> differently than previous patch this one seems to show improvements:
>>
>> nr_threads      base            head(SPIN_COUNT=10)  head(SPIN_COUNT=1000)
>> 1               27566206        28776779 (4.206770)  28778073 (4.211078)
>> 2               8498813         9129102 (6.904173)   7042975 (-20.670782)
>> 7               5019434         5832195 (13.935765)  5098511 (1.550982)
>> 14              4379155         6507212 (32.703053)  5200018 (15.785772)
>> 28              4397464         4584480 (4.079329)   4456767 (1.330628)
>> 56              4020956         3534899 (-13.750237) 4096197 (1.836850)
>> "
> 
> Ah, nice, I had missed that.  I suppose this means we can risk enabling it by default.
> 
There are two major changes in this patch.
1) Change the spinning way from trylock to read only while spinning, it should benefit many
architectures since it can avoid expensive memory synchronization among processors caused by
read-for-ownership request. Similar way has been adopted by pthread/kernel spin lock.

2) Fall a thread into block if it fails to acquire lock when we observed the lock is available.
This is a radical change. It can bring significant performance improvement in the case of severe
lock contention(many threads contending for a lock), because the spinner always can't acquire
the lock in its spinning duration. Thus, putting it to a waiting list can save CPU time, power
budget and eliminate the overhead of atomic operation.
For the case in which a thread may acquire the lock while spinning, I understood it is controversial
to call into the kernel to block rather than go on spinning until timeout. 

Therefore, I will drop the second change for V3 series. More investigation and tests will be done before
pushing the second change.

I will send V3 for that if no one has different ideas? Thanks

> Thanks,
> Florian