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Re: [PATCH] x86-64: Put L(SP_INF_0) in .rodata.cst4 section [BZ #21955]
- From: "H.J. Lu" <hongjiu dot lu at intel dot com>
- To: GNU C Library <libc-alpha at sourceware dot org>
- Date: Tue, 15 Aug 2017 12:55:41 -0700
- Subject: Re: [PATCH] x86-64: Put L(SP_INF_0) in .rodata.cst4 section [BZ #21955]
- Authentication-results: sourceware.org; auth=none
- References: <20170815173855.GA19119@gmail.com>
- Reply-to: "H.J. Lu" <hjl dot tools at gmail dot com>
On Tue, Aug 15, 2017 at 10:38:55AM -0700, H.J. Lu wrote:
> sysdeps/x86_64/fpu/e_expf.S has
>
> /* Here if |x| is Inf */
> lea L(SP_INF_0)(%rip), %rdx /* depending on sign of x: */
> movss (%rdx,%rax,4), %xmm0 /* return zero or Inf */
> ret
> ...
> .section .rodata.cst8,"aM",@progbits,8
> ...
> .p2align 2
> L(SP_INF_0):
> .long 0x7f800000 /* single precision Inf */
> .long 0 /* single precision zero */
> .type L(SP_INF_0), @object
> ASM_SIZE_DIRECTIVE(L(SP_INF_0))
>
> Since L(SP_INF_0) is accessed as an array of 4-byte elements, it should
> be placed in
>
> .section .rodata.cst4,"aM",@progbits,4
>
> Tested on x86-64. Any comments?
>
> H.J.
> ---
> [BZ #21955]
> * sysdeps/x86_64/fpu/e_expf.S (L(SP_INF_0)): Place it in
> .rodata.cst4 section.
L(SP_RANGE) has the same issue. This updated patch fixes both.
H.J.
---
sysdeps/x86_64/fpu/e_expf.S has
lea L(SP_RANGE)(%rip), %rdx /* load over/underflow bound */
cmpl (%rdx,%rax,4), %ecx /* |x|<under/overflow bound ? */
...
/* Here if |x| is Inf */
lea L(SP_INF_0)(%rip), %rdx /* depending on sign of x: */
movss (%rdx,%rax,4), %xmm0 /* return zero or Inf */
ret
...
.section .rodata.cst8,"aM",@progbits,8
...
.p2align 2
L(SP_RANGE): /* single precision overflow/underflow bounds */
.long 0x42b17217 /* if x>this bound, then result overflows */
.long 0x42cff1b4 /* if x<this bound, then result underflows */
.type L(SP_RANGE), @object
ASM_SIZE_DIRECTIVE(L(SP_RANGE))
.p2align 2
L(SP_INF_0):
.long 0x7f800000 /* single precision Inf */
.long 0 /* single precision zero */
.type L(SP_INF_0), @object
ASM_SIZE_DIRECTIVE(L(SP_INF_0))
Since L(SP_RANGE) and L(SP_INF_0) are accessed as arrays of 4-byte
elements, they should be placed in .rodata.cst4 section.
[BZ #21955]
* sysdeps/x86_64/fpu/e_expf.S (L(SP_RANGE)): Place it in
.rodata.cst4 section.
(L(SP_INF_0)): Likewise.
---
sysdeps/x86_64/fpu/e_expf.S | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/sysdeps/x86_64/fpu/e_expf.S b/sysdeps/x86_64/fpu/e_expf.S
index 4fd2bb1fb5..29e421b4bd 100644
--- a/sysdeps/x86_64/fpu/e_expf.S
+++ b/sysdeps/x86_64/fpu/e_expf.S
@@ -297,6 +297,7 @@ L(DP_P0): /* double precision polynomial coefficient P0 */
.type L(DP_P0), @object
ASM_SIZE_DIRECTIVE(L(DP_P0))
+ .section .rodata.cst4,"aM",@progbits,4
.p2align 2
L(SP_RANGE): /* single precision overflow/underflow bounds */
.long 0x42b17217 /* if x>this bound, then result overflows */
@@ -311,7 +312,6 @@ L(SP_INF_0):
.type L(SP_INF_0), @object
ASM_SIZE_DIRECTIVE(L(SP_INF_0))
- .section .rodata.cst4,"aM",@progbits,4
.p2align 2
L(SP_RS): /* single precision 2^23+2^22 */
.long 0x4b400000
--
2.13.5