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Re: Remove sparcv8 support
- From: Sam Ravnborg <sam at ravnborg dot org>
- To: David Miller <davem at davemloft dot net>
- Cc: carlos at redhat dot com, triegel at redhat dot com, adhemerval dot zanella at linaro dot org, andreas at gaisler dot com, libc-alpha at sourceware dot org, software at gaisler dot com
- Date: Mon, 7 Nov 2016 22:20:50 +0100
- Subject: Re: Remove sparcv8 support
- Authentication-results: sourceware.org; auth=none
- References: <firstname.lastname@example.org> <email@example.com> <firstname.lastname@example.org> <email@example.com>
On Mon, Nov 07, 2016 at 11:38:25AM -0500, David Miller wrote:
> So the following attached is what I started playing around with this
> It implements software trap "0x23" to perform a CAS operations, the
> operands are expected in registers %o0, %o1, and %o2.
> Since it was easiest to test I implemented this first on sparc64 which
> just executes the CAS instruction directly. I'll start working on the
> 32-bit part in the background.
> The capability will be advertised via the mask returned by the "get
> kernel features" system call. We could check this early in the
> crt'ish code and cache the value in a variable which the atomics can
> Another kernel side change I have to do is advertise the LEON CAS
> availability in the _dl_hwcaps so that we can use the LEON CAS in
> glibc when available.
> The first patch is the kernel side, and the second is the glibc side.
> The whole NPTL testsuite passes for the plain 32-bit sparc target with
> these changes.
Glad that you found some time to look into this!
> >From fa1cad39df7318cdb46baea5774c340322cd74f2 Mon Sep 17 00:00:00 2001
> From: "David S. Miller" <firstname.lastname@example.org>
> Date: Mon, 7 Nov 2016 08:27:05 -0800
> Subject: [PATCH] sparc64: Add CAS emulation trap.
> Older 32-bit sparc cpus (other than LEON) lack a CAS instruction, so
> we need to provide some kind of helper infrastructure in the kernel
> to emulate it.
> This is the first part which firstly defines the basic infrastructure
> and the simplest implementation, which is to just directly execute the
> instruction on sparc64.
> We make use of the window fill/spill fault unwind facilities to make
> this as simple as possible. When we take a full TSB miss, we check if
> the trap level is greater than one, and if so unwind the trap to one
> of the final 3 instructions of the interrupted trap handler's block.
> Which of the three to use is based upon whether this is a real fault,
> an unaligned access, or a data access exception (ie. bus error).
> Signed-off-by: David S. Miller <email@example.com>
> arch/sparc/include/uapi/asm/unistd.h | 1 +
> arch/sparc/kernel/Makefile | 1 +
> arch/sparc/kernel/sys_sparc_64.c | 2 +-
> arch/sparc/kernel/ttable_64.S | 3 ++-
> 4 files changed, 5 insertions(+), 2 deletions(-)
casemul.S is missing.
So all the fun kernel stuf was not included in the patch...