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Re: [PATCH] Fix atomic_full_barrier on x86 and x86_64.
- From: Torvald Riegel <triegel at redhat dot com>
- To: "Joseph S. Myers" <joseph at codesourcery dot com>
- Cc: Rich Felker <dalias at libc dot org>, GLIBC Devel <libc-alpha at sourceware dot org>, Richard Henderson <rth at twiddle dot net>, "Carlos O'Donell" <carlos at redhat dot com>
- Date: Mon, 15 Dec 2014 22:56:49 +0100
- Subject: Re: [PATCH] Fix atomic_full_barrier on x86 and x86_64.
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On Mon, 2014-12-08 at 17:38 +0100, Torvald Riegel wrote:
> On Tue, 2014-11-25 at 11:51 +0100, Torvald Riegel wrote:
> > On Wed, 2014-10-29 at 22:54 +0000, Joseph S. Myers wrote:
> > > On Wed, 29 Oct 2014, Torvald Riegel wrote:
> > >
> > > > So, mfence seems to have been introduced with SSE2. Should I try to
> > > > test for SSE2 specifically, or rather assume SSE2 support for i786?
> > >
> > > I think the i786 directories should be removed; config.guess will never
> > > return such a processor name for GNU/Linux at least (I don't know what it
> > > returns on Hurd). The comment in sysdeps/i386/i786/Implies suggests it
> > > was for PII, but PII was still family 6 (and family 15 came after family
> > > 6, I don't think there were any x86 processors with family numbers 7 to
> > > 14).
> > >
> > > So, anything conditional on SSE2 should test for __SSE2__.
> > How does this updated patch look? The non-SSE full barrier is what,
> > AFAIU, GCC emits.