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PATCH [BZ #17259]: sysdeps/x86_64/cacheinfo.c:intel_check_word may corrupt rbx
- From: "H.J. Lu" <hongjiu dot lu at intel dot com>
- To: GNU C Library <libc-alpha at sourceware dot org>
- Date: Tue, 12 Aug 2014 09:08:27 -0700
- Subject: PATCH [BZ #17259]: sysdeps/x86_64/cacheinfo.c:intel_check_word may corrupt rbx
- Authentication-results: sourceware.org; auth=none
- Reply-to: "H.J. Lu" <hjl dot tools at gmail dot com>
intel_check_word has
asm volatile ("xchgl %%ebx, %1; cpuid; xchgl %%ebx, %1"
: "=a" (eax), "=r" (ebx), "=c" (ecx), "=d" (edx)
: "0" (4), "2" (round));
The only register compiler isn't aware of is RBX. No other registers are
impacted. We are lucky that it doesn't cause any problems since RBX
is also used by compiler for other purposes so that RBX is saved and
restored in intel_check_word. This patch uses __cpuid_count instead.
Tested on x86 and x86-64. OK to install?
Thanks.
H.J.
---
2014-08-12 H.J. Lu <hongjiu.lu@intel.com>
[BZ #17259]
* sysdeps/x86_64/cacheinfo.c (intel_check_word): Replace cpuid
asm statement with __cpuid_count.
diff --git a/sysdeps/x86_64/cacheinfo.c b/sysdeps/x86_64/cacheinfo.c
index 163af2a..ca13a53 100644
--- a/sysdeps/x86_64/cacheinfo.c
+++ b/sysdeps/x86_64/cacheinfo.c
@@ -191,9 +191,7 @@ intel_check_word (int name, unsigned int value, bool *has_level_2,
unsigned int round = 0;
while (1)
{
- asm volatile ("xchgl %%ebx, %1; cpuid; xchgl %%ebx, %1"
- : "=a" (eax), "=r" (ebx), "=c" (ecx), "=d" (edx)
- : "0" (4), "2" (round));
+ __cpuid_count (4, round, eax, ebx, ecx, edx);
enum { null = 0, data = 1, inst = 2, uni = 3 } type = eax & 0x1f;
if (type == null)