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Re: [PATCH] PowerPC64: Add __private_ss field to TCB header
- From: Adhemerval Zanella <azanella at linux dot vnet dot ibm dot com>
- To: munroe at us dot ibm dot com, Ulrich Weigand <uweigand at de dot ibm dot com>
- Cc: libc-alpha at sourceware dot org
- Date: Thu, 14 Nov 2013 18:07:54 -0200
- Subject: Re: [PATCH] PowerPC64: Add __private_ss field to TCB header
- Authentication-results: sourceware.org; auth=none
- References: <201311122119 dot rACLJ1Fc016035 at d06av02 dot portsmouth dot uk dot ibm dot com> <1384458661 dot 14825 dot 18 dot camel at oc8268013063 dot ibm dot com>
On 14-11-2013 17:51, Steven Munroe wrote:
> On Tue, 2013-11-12 at 22:19 +0100, Ulrich Weigand wrote:
>
> I have to remind myself each time how this sould work ...
>
> "The tp offset allows for efficient addressing of the TCB and up to
> 4K-16 of other thread library information."
>
> and
>
> /* The following assumes that TP (R2 or R13) points to the end of the
> TCB + 0x7000 (per the ABI). This implies that TCB address is
> TP - 0x7000. As we define TLS_DTV_AT_TP we can
> assume that the pthread struct is allocated immediately ahead of the
> TCB. This implies that the pthread_descr address is
> TP - (TLS_PRE_TCB_SIZE + 0x7000). */
>
> The key is that new fields are added above previous fields so to
> maintain upward compatibility release to release.
>
> Adhemerval is that correct?
Ye, you can check if this does not change by checking the results values of adding the
fields at nptl/sysdeps/powerpc/tcb-offsets.sym. Without the patch the offsets are:
#define POINTER_GUARD -28696
#define EBB_CTX_POINTER -28720
#define EBB_HANDLER -28728
#define EBB_RESERVED1 -28712
#define EBB_RESERVED2 -28704
After the patch:
#define POINTER_GUARD -28696
#define EBB_CTX_POINTER -28720
#define EBB_HANDLER -28728
#define EBB_RESERVED1 -28712
#define EBB_RESERVED2 -28704
#define PRIVATE_SS -28736
So the offset kept the same.