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Re: [x86-64 psABI] RFC: Extend x86-64 PLT entry to support MPX
- From: "H.J. Lu" <hjl dot tools at gmail dot com>
- To: Ian Lance Taylor <iant at google dot com>
- Cc: Roland McGrath <roland at hack dot frob dot com>, GNU C Library <libc-alpha at sourceware dot org>, GCC Development <gcc at gcc dot gnu dot org>, Binutils <binutils at sourceware dot org>, "Girkar, Milind" <milind dot girkar at intel dot com>, "Kreitzer, David L" <david dot l dot kreitzer at intel dot com>
- Date: Wed, 7 Aug 2013 17:33:08 -0700
- Subject: Re: [x86-64 psABI] RFC: Extend x86-64 PLT entry to support MPX
- References: <CAMe9rOp=1v38F_aV-pbv50YOGSEr_ju+byZP1L_G_h4bm5Ad3w at mail dot gmail dot com> <20130724233621 dot DA6942C08C at topped-with-meat dot com> <CAKOQZ8zn2KHayUrdKPOB0ys0Y794c5-t8Zw6hefeB5NGXTXKRw at mail dot gmail dot com> <CAMe9rOrbU--x0vZWB0mdjwJo6U5CsOJ6h_7tnwaeya8VHcujGw at mail dot gmail dot com>
Here is the proposal to add Tag_GNU_X86_EXTERN_BRANCH and
NT_X86_FEATURE_PLT_BND. Any comments?
--
H.J.
---
Intel MPX:
http://software.intel.com/sites/default/files/319433-015.pdf
introduces 4 bound registers, which will be used for parameter passing
in x86-64. Bound registers are cleared by branch instructions. Branch
instructions with BND prefix will keep bound register contents. This leads
to 2 requirements to 64-bit MPX run-time:
1. Dynamic linker (ld.so) should save and restore bound registers during
symbol lookup.
2. Extend the current 16-byte PLT entry:
ff 25 00 00 00 00 jmpq *name@GOTPCREL(%rip)
68 00 00 00 00 pushq $index
e9 00 00 00 00 jmpq PLT0
which clears bound registers, to 32-byte to add BND prefix to branch
instructions:
f2 ff 25 00 00 00 00 bnd jmpq *name@GOTPCREL(%rip)
68 00 00 00 00 pushq $index
f2 e9 00 00 00 00 bfd jmpq PLT0
0f 1f 80 00 00 00 00 nopl 0(%rax)
0f 1f 80 00 00 00 00 nopl 0(%rax)
We use the .gnu_attribute directive to record an object attribute:
enum
{
Tag_GNU_X86_EXTERN_BRANCH = 4,
};
for the types of external branch instructions in relocatable files.
enum
{
/* All external branch instructions are legacy. */
Val_GNU_X86_EXTERN_BRANCH_LEGACY = 0,
/* There is at lease one external branch instruction with BND prefix. */
Val_GNU_X86_EXTERN_BRANCH_BND = 1,
};
An x86 feature note section, .note.x86-feature, is used to indicate
features in executables and shared library. The contents of this note
section are:
.section .note.x86-feature
.align 4
.long .L1 - .L0
.long .L3 - .L2
.long 1
.L0:
.asciz "x86 feature"
.L1:
.align 4
.L2:
.long FeatureFlag (Feature flag)
.L3:
The current valid bits in FeatureFlag are
#define NT_X86_FEATURE_PLT_BND (0x1 << 0)
It should be set if PLT entry has BND prefix to preserve bound registers.
The remaining bits in FeatureFlag are reserved.
When merging Tag_GNU_X86_EXTERN_BRANCH, if any input relocatable
file has Tag_GNU_X86_EXTERN_BRANCH set to Val_GNU_X86_EXTERN_BRANCH_BND,
the resulting Tag_GNU_X86_EXTERN_BRANCH value should be
Val_GNU_X86_EXTERN_BRANCH_BND.
When generating executable or shared library, if PLT is needed and
Tag_GNU_X86_EXTERN_BRANCH value is Val_GNU_X86_EXTERN_BRANCH_BND,
the 32-byte PLT entry should be used and the feature note section should
be generated with the NT_X86_FEATURE_PLT_BND bit set to 1 and the feature
note section should be included in PT_NOTE segment. The benefit of the
note section is it is backward compatible with existing run-time and tools.