[x86-64 psABI] RFC: Extend x86-64 PLT entry to support MPX

["H.J. Lu" <hjl dot tools at gmail dot com>]

Intel MPX:

http://software.intel.com/sites/default/files/319433-015.pdf

introduces 4 bound registers, which will be used for parameter passing
in x86-64.  Bound registers are cleared by branch instructions.  Branch
instructions with BND prefix will keep bound register contents. This leads
to 2 requirements to 64-bit MPX run-time:
 1. Dynamic linker (ld.so) should save and restore bound registers during
    symbol lookup.
 2. Extend the current 16-byte PLT entry:

  ff 25 32 8b 21 00        jmpq   *name@GOTPCREL(%rip)
  68 00 00 00 00           pushq  $index
  e9 00 00 00 00           jmpq   PLT0

    which clear bound registers, to 32-byte to add BND prefix to branch
    instructions.

There are 2 psABI considerations:

 1. Should PLT entries in all binaries, with and without MPX, be changed
    to 32-byte or just the necessary ones?
 2. Only branch to PLT entry with BND prefix needs 32-byte PLT entry. If
    we use 32-byte PLT entry only when needed, it can be decided by:
    a. A new MPX PLT relocation:
       i. No new run-time relocation since MPX PLT relocation is
      resolved to branch to PLT entry at link-time.
       ii. Pro: No new section.
       iii. Con:
        Need a new relocation.
        Can't mark executable nor shared library.
    b. A new note section to indicate branches to external symbols with MPX
       prefix:
       i. A note section in relocatable and addition to PT_NOTE segment
          in executable and shared library.
       ii. Pro: No new relocation.
       iii. Con: A new section.

Here is the proposed note section:

An optional x86 feature note section, .note.x86-feature, to indicate
features in the input files. The contents of this note section are:

    .section        .note.x86-feature
    .align          4
    .long           .L1 - .L0
    .long           .L3 - .L2
    .long           1
.L0:
    .asciz         "x86 feature"
.L1:
    .align          4
.L2:
    .long        FeatureFlag (Feature flag)
.L3:

The current valid bits in FeatureFlag are

#define NT_X86_FEATURE_BND_INSN_RELOC    (0x1 << 0)

It should be set if relocation against externally visible symbol is applied
to instruction with BND prefix.

The remaining bits in FeatureFlag are reserved.

If a linker supports the optional feature note section, it should follow
the rules below when processing the relocatable input for generating
relocatable file, executable or shared library:

1. Relocatable files without the feature note section are considered
as if FeatureFlag is zero.
2. An FeatureFlag bit is set if it is set in any input relocatable files.
3. The feature note section should be generated in the output file if any
FeatureFlag bit is set.
4. The feature note section should be included in PT_NOTE segment when
generating executable or shared library.

I prefer the note section solution.  Any suggestions, comments?



--
H.J.