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RE: [PATCH 2/2] MIPS16: MIPS16 support proper

On Fri, 2013-01-25 at 05:13 +0000, Maciej W. Rozycki wrote:

>  Have you tried running your code on actual hardware?  This is how we did 
> testing of all these changes.

I thought I had a simple program working on my 74K, but I just tried a
test case (hello world compiled statically) and it gave me a bus error.

>  Please also note that as I mentioned along the patch submission mixing 
> execution modes in static constructors or destructors installed as single 
> lumps of code (that is with the use of the DT_INIT or DT_FINI dynamic 
> tags) cannot be supported.  Can you run `objdump -j .init -j .fini -d' on 
> your binary and make sure the disassembly looks right?

Mine looks a bit different, this is the .init and .fini from a
dynamically linked big endian hello world program, I am not sure where
the addiu instructions are coming from.

x:     file format elf32-tradbigmips

Disassembly of section .init:

004004d0 <_init>:
  4004d0:	f000 6a02 	li	v0,2
  4004d4:	f2f0 0b0c 	la	v1,3f87c0 <_DYNAMIC-0x7a08>
  4004d8:	f400 3240 	sll	v0,16
  4004dc:	e269      	addu	v0,v1
  4004de:	64c4      	save	32,ra
  4004e0:	659a      	move	gp,v0
  4004e2:	d204      	sw	v0,16(sp)
  4004e4:	f030 9a64 	lw	v1,-32732(v0)
  4004e8:	2304      	beqz	v1,4004f2 <_init+0x22>
  4004ea:	f030 9a44 	lw	v0,-32732(v0)
  4004ee:	ea40      	jalr	v0
  4004f0:	653a      	move	t9,v0
  4004f2:	6500      	nop
  4004f4:	0411      	addiu	a0,sp,68
  4004f6:	0001      	addiu	s0,sp,4
  4004f8:	0000      	addiu	s0,sp,0
  4004fa:	0000      	addiu	s0,sp,0
  4004fc:	7410      	cmpi	a0,16
  4004fe:	0196      	addiu	s1,sp,600
  400500:	0000      	addiu	s0,sp,0
  400502:	0000      	addiu	s0,sp,0
  400504:	0411      	addiu	a0,sp,68
  400506:	0001      	addiu	s0,sp,4
  400508:	0000      	addiu	s0,sp,0
  40050a:	0000      	addiu	s0,sp,0
  40050c:	7410      	cmpi	a0,16
  40050e:	01c0      	addiu	s1,sp,768
  400510:	0000      	addiu	s0,sp,0
  400512:	0000      	addiu	s0,sp,0
  400514:	6444      	restore	32,ra
  400516:	e8a0      	jrc	ra

Disassembly of section .fini:

00400730 <_fini>:
  400730:	f000 6a02 	li	v0,2
  400734:	f090 0b0c 	la	v1,3f87c0 <_DYNAMIC-0x7a08>
  400738:	f400 3240 	sll	v0,16
  40073c:	e269      	addu	v0,v1
  40073e:	64c4      	save	32,ra
  400740:	659a      	move	gp,v0
  400742:	d204      	sw	v0,16(sp)
  400744:	0411      	addiu	a0,sp,68
  400746:	0001      	addiu	s0,sp,4
  400748:	0000      	addiu	s0,sp,0
  40074a:	0000      	addiu	s0,sp,0
  40074c:	7410      	cmpi	a0,16
  40074e:	0182      	addiu	s1,sp,520
  400750:	0000      	addiu	s0,sp,0
  400752:	0000      	addiu	s0,sp,0
  400754:	6444      	restore	32,ra
  400756:	e8a0      	jrc	ra

Steve Ellcey

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