Re: Not supporting all rounding modes

[Thomas Schwinge <thomas at codesourcery dot com>]

Hi!

On Tue, 29 May 2012 15:06:40 +0200, I wrote:
> On Fri, 18 May 2012 12:54:29 +0200, I wrote:
> > math/test-float.out:
> > 
> > [old] The rint_downward, rint_upward, lrint_downward, lrint_upward,
> > llrint_downward, llrint_upward functions round towards the wrong end.
> 
> Well, that one is "simple" enough -- once you get the idea...
> 
> The SH-4A Software Manual as well as the SH7785 Hardware Manual say in
> Â6.3.2 Floating-Point Status/Control Register (FPSCR)Â:
> 
>     Bit | Bit Name | Initial | R/W | Description
>         |          | Value   |     |
>     [...]
>       1 |      RM1 |       0 | R/W | Rounding Mode
>       0 |      RM0 |       1 | R/W | These bits select the rounding mode.
>                                    | 00: Round to Nearest
>                                    | 01: Round to Zero
>                                    | 10: Reserved
>                                    | 11: Reserved
> 
> On the other hand, sysdeps/sh/sh4/fpu/bits/fenv.h proclaims:
> 
>     /* The SH FPU supports all of the four defined rounding modes.  We
>        use again the bit positions in the FPU control word as the values
>        for the appropriate macros.  */
>     enum
>       {
>         FE_TONEAREST = 0x0,
>     #define FE_TONEAREST	FE_TONEAREST
>         FE_TOWARDZERO = 0x1,
>     #define FE_TOWARDZERO	FE_TOWARDZERO
>         FE_UPWARD = 0x2,
>     #define FE_UPWARD	FE_UPWARD
>         FE_DOWNWARD = 0x3
>     #define FE_DOWNWARD	FE_DOWNWARD
>       };

Turns out this is directly from back when Kaz and Yutaka Niibe (CCed)
added the SH glibc port, twelve years ago.  Do you guys happen to
remember the history about these rounding modes, or would you agree to
remove FE_UPWARD and FE_DOWNWARD from the list of supported modes?  Or,
does SH-4-based hardware exist that supports all four modes, and we have
to do this in a more fine-grained fashion?


GrÃÃe,
 Thomas

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