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[PATCH] Fix comment formatting in new optimized sparc math files.


As pointed out by Roland.

---
 ChangeLog                                   |   11 ++++++
 sysdeps/sparc/sparc32/sparcv9/fpu/s_ceil.S  |   45 +++++++++++++--------------
 sysdeps/sparc/sparc32/sparcv9/fpu/s_ceilf.S |   45 +++++++++++++--------------
 sysdeps/sparc/sparc32/sparcv9/fpu/s_rint.S  |   13 +++----
 sysdeps/sparc/sparc32/sparcv9/fpu/s_rintf.S |   13 +++----
 sysdeps/sparc/sparc64/fpu/s_ceil.S          |   45 +++++++++++++--------------
 sysdeps/sparc/sparc64/fpu/s_ceilf.S         |   45 +++++++++++++--------------
 sysdeps/sparc/sparc64/fpu/s_rint.S          |   13 +++----
 sysdeps/sparc/sparc64/fpu/s_rintf.S         |   13 +++----
 9 files changed, 123 insertions(+), 120 deletions(-)

diff --git a/ChangeLog b/ChangeLog
index 3d1686b..cd409b2 100644
--- a/ChangeLog
+++ b/ChangeLog
@@ -1,3 +1,14 @@
+2012-02-27  David S. Miller  <davem@davemloft.net>
+
+	* sysdeps/sparc/sparc32/sparcv9/fpu/s_ceil.S: Fix comment formatting.
+	* sysdeps/sparc/sparc32/sparcv9/fpu/s_ceilf.S: Likewise.
+	* sysdeps/sparc/sparc32/sparcv9/fpu/s_rint.S: Likewise.
+	* sysdeps/sparc/sparc32/sparcv9/fpu/s_rintf.S: Likewise.
+	* sysdeps/sparc/sparc64/fpu/s_ceil.S: Likewise.
+	* sysdeps/sparc/sparc64/fpu/s_ceilf.S: Likewise.
+	* sysdeps/sparc/sparc64/fpu/s_rint.S: Likewise.
+	* sysdeps/sparc/sparc64/fpu/s_rintf.S: Likewise.
+
 2012-02-27  Joseph Myers  <joseph@codesourcery.com>
 
 	* configure.in (CC): Restrict allowed GCC versions to 4.3 and
diff --git a/sysdeps/sparc/sparc32/sparcv9/fpu/s_ceil.S b/sysdeps/sparc/sparc32/sparcv9/fpu/s_ceil.S
index 7364f82..5e32b68 100644
--- a/sysdeps/sparc/sparc32/sparcv9/fpu/s_ceil.S
+++ b/sysdeps/sparc/sparc32/sparcv9/fpu/s_ceil.S
@@ -20,29 +20,28 @@
 #include <sysdep.h>
 
 	/* Since changing the rounding mode is extremely expensive, we
-	 * try to round up using a method that is rounding mode
-	 * agnostic.
-	 *
-	 * We add then subtract (or subtract than add if the initial
-	 * value was negative) 2**23 to the value, then subtract it
-	 * back out.
-	 *
-	 * This will clear out the fractional portion of the value.
-	 * One of two things will happen for non-whole initial values.
-	 * Either the rounding mode will round it up, or it will be
-	 * rounded down.  If the value started out whole, it will be
-	 * equal after the addition and subtraction.  This means we
-	 * can accurately detect with one test whether we need to add
-	 * another 1.0 to round it up properly.
-	 *
-	 * We pop constants into the FPU registers using the incoming
-	 * argument stack slots, since this avoid having to use any PIC
-	 * references.  We also thus avoid having to allocate a register
-	 * window.
-	 *
-	 * VIS instructions are used to facilitate the formation of
-	 * easier constants, and the propagation of the sign bit.
-	 */
+	   try to round up using a method that is rounding mode
+	   agnostic.
+
+	   We add then subtract (or subtract than add if the initial
+	   value was negative) 2**23 to the value, then subtract it
+	   back out.
+
+	   This will clear out the fractional portion of the value.
+	   One of two things will happen for non-whole initial values.
+	   Either the rounding mode will round it up, or it will be
+	   rounded down.  If the value started out whole, it will be
+	   equal after the addition and subtraction.  This means we
+	   can accurately detect with one test whether we need to add
+	   another 1.0 to round it up properly.
+
+	   We pop constants into the FPU registers using the incoming
+	   argument stack slots, since this avoid having to use any
+	   PIC references.  We also thus avoid having to allocate a
+	   register window.
+
+	   VIS instructions are used to facilitate the formation of
+	   easier constants, and the propagation of the sign bit.  */
 
 #define TWO_FIFTYTWO	0x43300000		/* 2**52 */
 #define ONE_DOT_ZERO	0x3ff00000		/* 1.0 */
diff --git a/sysdeps/sparc/sparc32/sparcv9/fpu/s_ceilf.S b/sysdeps/sparc/sparc32/sparcv9/fpu/s_ceilf.S
index fbc6faa..e5129fd 100644
--- a/sysdeps/sparc/sparc32/sparcv9/fpu/s_ceilf.S
+++ b/sysdeps/sparc/sparc32/sparcv9/fpu/s_ceilf.S
@@ -20,29 +20,28 @@
 #include <sysdep.h>
 
 	/* Since changing the rounding mode is extremely expensive, we
-	 * try to round up using a method that is rounding mode
-	 * agnostic.
-	 *
-	 * We add then subtract (or subtract than add if the initial
-	 * value was negative) 2**23 to the value, then subtract it
-	 * back out.
-	 *
-	 * This will clear out the fractional portion of the value.
-	 * One of two things will happen for non-whole initial values.
-	 * Either the rounding mode will round it up, or it will be
-	 * rounded down.  If the value started out whole, it will be
-	 * equal after the addition and subtraction.  This means we
-	 * can accurately detect with one test whether we need to add
-	 * another 1.0 to round it up properly.
-	 *
-	 * We pop constants into the FPU registers using the incoming
-	 * argument stack slots, since this avoid having to use any PIC
-	 * references.  We also thus avoid having to allocate a register
-	 * window.
-	 *
-	 * VIS instructions are used to facilitate the formation of
-	 * easier constants, and the propagation of the sign bit.
-	 */
+	   try to round up using a method that is rounding mode
+	   agnostic.
+
+	   We add then subtract (or subtract than add if the initial
+	   value was negative) 2**23 to the value, then subtract it
+	   back out.
+
+	   This will clear out the fractional portion of the value.
+	   One of two things will happen for non-whole initial values.
+	   Either the rounding mode will round it up, or it will be
+	   rounded down.  If the value started out whole, it will be
+	   equal after the addition and subtraction.  This means we
+	   can accurately detect with one test whether we need to add
+	   another 1.0 to round it up properly.
+
+	   We pop constants into the FPU registers using the incoming
+	   argument stack slots, since this avoid having to use any
+	   PIC references.  We also thus avoid having to allocate a
+	   register window.
+
+	   VIS instructions are used to facilitate the formation of
+	   easier constants, and the propagation of the sign bit.  */
 
 #define TWO_TWENTYTHREE	0x4b000000		/* 2**23 */
 #define ONE_DOT_ZERO	0x3f800000		/* 1.0 */
diff --git a/sysdeps/sparc/sparc32/sparcv9/fpu/s_rint.S b/sysdeps/sparc/sparc32/sparcv9/fpu/s_rint.S
index 8cae9b8..9f9fddd 100644
--- a/sysdeps/sparc/sparc32/sparcv9/fpu/s_rint.S
+++ b/sysdeps/sparc/sparc32/sparcv9/fpu/s_rint.S
@@ -20,13 +20,12 @@
 #include <sysdep.h>
 
 	/* We pop constants into the FPU registers using the incoming
-	 * argument stack slots, since this avoid having to use any PIC
-	 * references.  We also thus avoid having to allocate a register
-	 * window.
-	 *
-	 * VIS instructions are used to facilitate the formation of
-	 * easier constants, and the propagation of the sign bit.
-	 */
+	   argument stack slots, since this avoid having to use any PIC
+	   references.  We also thus avoid having to allocate a register
+	   window.
+
+	   VIS instructions are used to facilitate the formation of
+	   easier constants, and the propagation of the sign bit.  */
 
 #define TWO_FIFTYTWO	0x43300000		/* 2**52 */
 
diff --git a/sysdeps/sparc/sparc32/sparcv9/fpu/s_rintf.S b/sysdeps/sparc/sparc32/sparcv9/fpu/s_rintf.S
index 2e67fa7..c053c55 100644
--- a/sysdeps/sparc/sparc32/sparcv9/fpu/s_rintf.S
+++ b/sysdeps/sparc/sparc32/sparcv9/fpu/s_rintf.S
@@ -20,13 +20,12 @@
 #include <sysdep.h>
 
 	/* We pop constants into the FPU registers using the incoming
-	 * argument stack slots, since this avoid having to use any PIC
-	 * references.  We also thus avoid having to allocate a register
-	 * window.
-	 *
-	 * VIS instructions are used to facilitate the formation of
-	 * easier constants, and the propagation of the sign bit.
-	 */
+	   argument stack slots, since this avoid having to use any PIC
+	   references.  We also thus avoid having to allocate a register
+	   window.
+
+	   VIS instructions are used to facilitate the formation of
+	   easier constants, and the propagation of the sign bit.  */
 
 #define TWO_TWENTYTHREE	0x4b000000		/* 2**23 */
 
diff --git a/sysdeps/sparc/sparc64/fpu/s_ceil.S b/sysdeps/sparc/sparc64/fpu/s_ceil.S
index 7e9bfef..85d1a3c 100644
--- a/sysdeps/sparc/sparc64/fpu/s_ceil.S
+++ b/sysdeps/sparc/sparc64/fpu/s_ceil.S
@@ -20,29 +20,28 @@
 #include <sysdep.h>
 
 	/* Since changing the rounding mode is extremely expensive, we
-	 * try to round up using a method that is rounding mode
-	 * agnostic.
-	 *
-	 * We add then subtract (or subtract than add if the initial
-	 * value was negative) 2**23 to the value, then subtract it
-	 * back out.
-	 *
-	 * This will clear out the fractional portion of the value.
-	 * One of two things will happen for non-whole initial values.
-	 * Either the rounding mode will round it up, or it will be
-	 * rounded down.  If the value started out whole, it will be
-	 * equal after the addition and subtraction.  This means we
-	 * can accurately detect with one test whether we need to add
-	 * another 1.0 to round it up properly.
-	 *
-	 * We pop constants into the FPU registers using the incoming
-	 * argument stack slots, since this avoid having to use any PIC
-	 * references.  We also thus avoid having to allocate a register
-	 * window.
-	 *
-	 * VIS instructions are used to facilitate the formation of
-	 * easier constants, and the propagation of the sign bit.
-	 */
+	   try to round up using a method that is rounding mode
+	   agnostic.
+
+	   We add then subtract (or subtract than add if the initial
+	   value was negative) 2**23 to the value, then subtract it
+	   back out.
+
+	   This will clear out the fractional portion of the value.
+	   One of two things will happen for non-whole initial values.
+	   Either the rounding mode will round it up, or it will be
+	   rounded down.  If the value started out whole, it will be
+	   equal after the addition and subtraction.  This means we
+	   can accurately detect with one test whether we need to add
+	   another 1.0 to round it up properly.
+
+	   We pop constants into the FPU registers using the incoming
+	   argument stack slots, since this avoid having to use any
+	   PIC references.  We also thus avoid having to allocate a
+	   register window.
+
+	   VIS instructions are used to facilitate the formation of
+	   easier constants, and the propagation of the sign bit.  */
 
 #define TWO_FIFTYTWO	0x43300000		/* 2**52 */
 #define ONE_DOT_ZERO	0x3ff00000		/* 1.0 */
diff --git a/sysdeps/sparc/sparc64/fpu/s_ceilf.S b/sysdeps/sparc/sparc64/fpu/s_ceilf.S
index 1ae7f7a..dd5c2f0 100644
--- a/sysdeps/sparc/sparc64/fpu/s_ceilf.S
+++ b/sysdeps/sparc/sparc64/fpu/s_ceilf.S
@@ -20,29 +20,28 @@
 #include <sysdep.h>
 
 	/* Since changing the rounding mode is extremely expensive, we
-	 * try to round up using a method that is rounding mode
-	 * agnostic.
-	 *
-	 * We add then subtract (or subtract than add if the initial
-	 * value was negative) 2**23 to the value, then subtract it
-	 * back out.
-	 *
-	 * This will clear out the fractional portion of the value.
-	 * One of two things will happen for non-whole initial values.
-	 * Either the rounding mode will round it up, or it will be
-	 * rounded down.  If the value started out whole, it will be
-	 * equal after the addition and subtraction.  This means we
-	 * can accurately detect with one test whether we need to add
-	 * another 1.0 to round it up properly.
-	 *
-	 * We pop constants into the FPU registers using the incoming
-	 * argument stack slots, since this avoid having to use any PIC
-	 * references.  We also thus avoid having to allocate a register
-	 * window.
-	 *
-	 * VIS instructions are used to facilitate the formation of
-	 * easier constants, and the propagation of the sign bit.
-	 */
+	   try to round up using a method that is rounding mode
+	   agnostic.
+
+	   We add then subtract (or subtract than add if the initial
+	   value was negative) 2**23 to the value, then subtract it
+	   back out.
+
+	   This will clear out the fractional portion of the value.
+	   One of two things will happen for non-whole initial values.
+	   Either the rounding mode will round it up, or it will be
+	   rounded down.  If the value started out whole, it will be
+	   equal after the addition and subtraction.  This means we
+	   can accurately detect with one test whether we need to add
+	   another 1.0 to round it up properly.
+
+	   We pop constants into the FPU registers using the incoming
+	   argument stack slots, since this avoid having to use any
+	   PIC references.  We also thus avoid having to allocate a
+	   register window.
+
+	   VIS instructions are used to facilitate the formation of
+	   easier constants, and the propagation of the sign bit.  */
 
 #define TWO_TWENTYTHREE	0x4b000000		/* 2**23 */
 #define ONE_DOT_ZERO	0x3f800000		/* 1.0 */
diff --git a/sysdeps/sparc/sparc64/fpu/s_rint.S b/sysdeps/sparc/sparc64/fpu/s_rint.S
index 38b6135..4589e2c 100644
--- a/sysdeps/sparc/sparc64/fpu/s_rint.S
+++ b/sysdeps/sparc/sparc64/fpu/s_rint.S
@@ -20,13 +20,12 @@
 #include <sysdep.h>
 
 	/* We pop constants into the FPU registers using the incoming
-	 * argument stack slots, since this avoid having to use any PIC
-	 * references.  We also thus avoid having to allocate a register
-	 * window.
-	 *
-	 * VIS instructions are used to facilitate the formation of
-	 * easier constants, and the propagation of the sign bit.
-	 */
+	   argument stack slots, since this avoid having to use any PIC
+	   references.  We also thus avoid having to allocate a register
+	   window.
+
+	   VIS instructions are used to facilitate the formation of
+	   easier constants, and the propagation of the sign bit.  */
 
 #define TWO_FIFTYTWO	0x43300000		/* 2**52 */
 
diff --git a/sysdeps/sparc/sparc64/fpu/s_rintf.S b/sysdeps/sparc/sparc64/fpu/s_rintf.S
index 42fda3f..7f7caa8 100644
--- a/sysdeps/sparc/sparc64/fpu/s_rintf.S
+++ b/sysdeps/sparc/sparc64/fpu/s_rintf.S
@@ -20,13 +20,12 @@
 #include <sysdep.h>
 
 	/* We pop constants into the FPU registers using the incoming
-	 * argument stack slots, since this avoid having to use any PIC
-	 * references.  We also thus avoid having to allocate a register
-	 * window.
-	 *
-	 * VIS instructions are used to facilitate the formation of
-	 * easier constants, and the propagation of the sign bit.
-	 */
+	   argument stack slots, since this avoid having to use any PIC
+	   references.  We also thus avoid having to allocate a register
+	   window.
+
+	   VIS instructions are used to facilitate the formation of
+	   easier constants, and the propagation of the sign bit.  */
 
 #define TWO_TWENTYTHREE	0x4b000000		/* 2**23 */
 
-- 
1.7.6.401.g6a319


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