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Re: [PATCH] PowerPC - cache line size initialization
libc-alpha-owner@sourceware.org wrote on 12/21/2011 08:30:17 PM:
> From: Ulrich Drepper <drepper@gmail.com>
> To: Adhemerval Zanella <azanella@linux.vnet.ibm.com>
> Cc: "GNU C. Library" <libc-alpha@sourceware.org>
> Date: 12/21/2011 09:37 PM
> Subject: Re: [PATCH] PowerPC - cache line size initialization
> Sent by: libc-alpha-owner@sourceware.org
>
> On Wed, Dec 21, 2011 at 07:45, Adhemerval Zanella
> <azanella@linux.vnet.ibm.com> wrote:
> > This patch address the __cache_line_size initialization by moving
> it to sooner point,
> > prior any DSO initialization.
>
> No. Just look what other architectures do. Also, if the value is not
> optimized all you should get is less performance. Otherwise the code
> isn't written as it should.
>
Adhermerval, just change to code to check for '0' __cache_line_size and if
equal execute as if the fill char is none zero (the path that does not use
DCBZ).
Assuming this is memset code is unique to A2/A2O only they will take the
hit (for allowing multiple cache line sizes).
This has been going on too long ...
Steven J. Munroe
Linux on Power Toolchain Architect