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PATCH: PR libc/10162: stratcliff test segfaults on ia64
- From: "H.J. Lu" <hongjiu dot lu at intel dot com>
- To: GNU C Library <libc-alpha at sourceware dot org>
- Date: Thu, 21 May 2009 12:44:41 -0700
- Subject: PATCH: PR libc/10162: stratcliff test segfaults on ia64
- Reply-to: "H.J. Lu" <hjl dot tools at gmail dot com>
memchr should use speculative load in software pipeline since we may
find the byte in the early stage before we reach the invalid page.
H.J.
---
2009-05-21 H.J. Lu <hongjiu.lu@intel.com>
PR libc/10162
* sysdeps/ia64/memchr.S: Use speculative load.
--- sysdeps/ia64/memchr.S.bar 2009-05-20 10:48:18.000000000 -0700
+++ sysdeps/ia64/memchr.S 2009-05-21 12:38:35.000000000 -0700
@@ -96,7 +96,8 @@ ENTRY(__memchr)
mov pr.rot = 1 << 16 ;;
.l2:
(p[0]) mov addr[0] = ret0
-(p[0]) ld8 value[0] = [ret0], 8
+(p[0]) ld8.s value[0] = [ret0], 8 // speculative load
+(p[MEMLAT]) chk.s value[MEMLAT], .recovery // check and recovery
(p[MEMLAT]) xor aux[0] = value[MEMLAT], chrx8
(p[MEMLAT+1]) czx1.r poschr[0] = aux[1]
(p[MEMLAT+2]) cmp.ne p7, p0 = 8, poschr[1]
@@ -124,6 +125,20 @@ ENTRY(__memchr)
mov ar.lc = saved_lc
br.ret.sptk.many b0
+.recovery:
+ adds ret0 = -((MEMLAT + 1) * 8), ret0;;
+(p[MEMLAT+1]) add ret0 = -8, ret0;;
+(p[MEMLAT+2]) add ret0 = -8, ret0;;
+.l4:
+ mov addr[MEMLAT+2] = ret0
+ ld8 tmp = [ret0];; // load the first unchecked 8byte
+ xor aux[1] = tmp, chrx8;;
+ czx1.r poschr[1] = aux[1];;
+ cmp.ne p7, p0 = 8, poschr[1]
+(p7) br.cond.spnt .foundit;;
+ adds ret0 = 8, ret0 // load the next unchecked 8byte
+ br.sptk .l4;;
+
END(__memchr)
weak_alias (__memchr, memchr)