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Re: [PATCH] Native POSIX Thread Library(NPTL) ARM SupportingPatches (1/3)
On Thu, 2003-05-29 at 15:21, Jakub Jelinek wrote:
> If ARMs are never going to be SMP, this seems like good idea
> if there are no spare registers.
Yep, there are indeed no spare registers.
Right now, there are no SMP ARM systems. We might see some in the
future, but there is always the option of locking down a line in the
d-cache for use as CPU-local scratchpad memory. I guess if that's a
possibility, it might be better for the kernel to pick the address of
the thread ID variable.