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Re: [firstname.lastname@example.org: [PATCH]: Bug in ppc32 ld.so]
> Can you come up with an example of how the CPU might do this?
> Remember, this code is not used for ld.so's PLT itself. At the time
> this routine is running, there should be no references to the
> newly-created PLT in the instruction sequence from that point, nor
> would sequential fetching reach the code.
Recent cpus predict branch and link and branch to link instructions and do
not always get it right. It is conceivable that the cpu mispredicts into
the zeroed page.
POWER4 also employs other methods for its prediction and we would need a
guarantee from the processor guys that it will not incorrectly predict
into the zeroed page under any circumstances.