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Re: PATCH: Fix ll/sc for mips (take 3)
From: "H . J . Lu" <email@example.com>
Subject: Re: PATCH: Fix ll/sc for mips (take 3)
Date: Fri, 1 Feb 2002 15:15:13 -0800
> Why not? Can you show me a MIPS II or above CPU which doesn't have
> branch-likely instruction? From gcc,
> /* ISA has branch likely instructions (eg. mips2). */
> /* Disable branchlikely for tx39 until compare rewrite. They haven't
> been generated up to this point. */
> #define ISA_HAS_BRANCHLIKELY (mips_isa != 1 \
> /* || TARGET_MIPS3900 */)
> Did I miss something?
I think we can assume CPU has branch-likely insns, if CPU has MIPS
ISA 2 or greater ISA, as H.J said. I don't know any exception of
this. If anyone know exceptions, please let us know.
(FYI: we can't assume CPU has LL/SC even if CPU has branch-likely
HL's patch looks good for me.