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[Bug string/23709] glibc 2.25 lacks sse2 optimized strstr()


https://sourceware.org/bugzilla/show_bug.cgi?id=23709

--- Comment #25 from cvs-commit at gcc dot gnu.org <cvs-commit at gcc dot gnu.org> ---
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The branch, release/2.28/master has been updated
       via  65010329f2c596bdd1204c1c9c9baac0193637af (commit)
      from  e1af1df694603c0dcd5118c30eea2cdeb01a1a0b (commit)

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https://sourceware.org/git/gitweb.cgi?p=glibc.git;h=65010329f2c596bdd1204c1c9c9baac0193637af

commit 65010329f2c596bdd1204c1c9c9baac0193637af
Author: Adhemerval Zanella <adhemerval.zanella@linaro.org>
Date:   Fri Nov 2 10:56:00 2018 +0100

    x86: Fix Haswell CPU string flags (BZ#23709)

    Th commit 'Disable TSX on some Haswell processors.' (2702856bf4) changed
the
    default flags for Haswell models.  Previously, new models were handled by
the
    default switch path, which assumed a Core i3/i5/i7 if AVX is available.
After
    the patch, Haswell models (0x3f, 0x3c, 0x45, 0x46) do not set the flags
    Fast_Rep_String, Fast_Unaligned_Load, Fast_Unaligned_Copy, and
    Prefer_PMINUB_for_stringop (only the TSX one).

    This patch fixes it by disentangle the TSX flag handling from the memory
    optimization ones.  The strstr case cited on patch now selects the
    __strstr_sse2_unaligned as expected for the Haswell cpu.

    Checked on x86_64-linux-gnu.

        [BZ #23709]
        * sysdeps/x86/cpu-features.c (init_cpu_features): Set TSX bits
        independently of other flags.

    (cherry picked from commit c3d8dc45c9df199b8334599a6cbd98c9950dba62)

-----------------------------------------------------------------------

Summary of changes:
 ChangeLog                  |    6 ++++++
 NEWS                       |    1 +
 sysdeps/x86/cpu-features.c |    6 ++++++
 3 files changed, 13 insertions(+), 0 deletions(-)

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