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Re: Register Cache.
- To: Steven Johnson <sjohnson at neurizon dot net>
- Subject: Re: Register Cache.
- From: Fernando Nasser <fnasser at redhat dot com>
- Date: Mon, 26 Mar 2001 20:17:46 -0500
- CC: Andrew Cagney <ac131313 at cygnus dot com>, Steven Johnson <sbjohnson at ozemail dot com dot au>, gdb at sources dot redhat dot com
- Organization: Red Hat Canada
- References: <8AE4B526B977D411841F00A0CC334020052C28@cuz-exchange.sdesigns.net> <39AC598A.DFAF67E9@ozemail.com.au> <3ABF562F.2144AF18@cygnus.com> <3ABF5DF9.4D630216@redhat.com> <3ABFD062.17EDADAF@neurizon.net>
Steven Johnson wrote:
> Fernando Nasser wrote:
> > However, I vaguely remember our register cache being a
> > "write-through" cache.
> It is, unless the data you are writing is already believed to be in the
> ie, Register contains 0xAA55
> Write 0x55AA to Register, and GDB updates target register with 0x55AA
> Write 0x55AA to Register again, and GDB checks it's cache, determines
> the value is already 0x55AA and does NOT write.
That is true. I forgot this little detail.
> I have gotten around the issues by invalidating the register cache
> between writes. This is obviously sub-optimal but it works OK.
> A better implementation would be to allow a setting on a register by
> register basis that sets how it will be cached by reg-cache. At the
> time of the original post, this was a fairly major undertaking.
> Regcache currently seems to be undergoing changes that will make
> implementing this easier but for the moment flushing works fine.
Yes, like "not cached" :-) For hardware/control registers caching is
just not good.
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