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Re: gcc compile

Hi everybody!

Since a few dayīs I try to make software trapīs using "swi" on the ARM
simulator build in gdb. I have tested the code on "real" hardware, it worked
fine. My hardware has a monitor program (angel), which is initializing the
superuser side and switches the proc to user mode before starting the
code at "start" from the crt0.S file.

I still canīt do these sw traps on the simulator. I get:

unknown SWI encountered - 1 - ignoring
unknown SWI encountered - 2 - ignoring
unknown SWI encountered - 3 - ignoring
unknown SWI encountered - 4 - ignoring

asm volatile (".equ REASON_CHANGE_TO_SV, 0x0");
asm volatile (".equ REASON_SET_I, 0x1");
asm volatile (".equ REASON_UNSET_I, 0x2");
asm volatile (".equ REASON_SET_F, 0x3");
asm volatile (".equ REASON_UNSET_F, 0x4");
asm volatile ("swi  #REASON_CHANGE_TO_SV");
asm volatile ("swi  #REASON_SET_I");
asm volatile ("swi  #REASON_UNSET_I");
asm volatile ("swi  #REASON_SET_F");

(it does not complain about "swi 0x0", if you may have noticed). I am sure that
it does not enter the function 

Dump of assembler code for function swi_wrapper__Fv:
0x2018ee8 <swi_wrapper__Fv>:	stmdb	sp!, {r0, r1, r2, r3, lr}
0x2018eec <swi_wrapper__Fv+4>:	ldr	r0, [lr, -#4]
0x2018ef0 <swi_wrapper__Fv+8>:	bic	r0, r0, #-16777216	; 0xff000000
0x2018ef4 <swi_wrapper__Fv+12>:	mov	r1, sp
0x2018ef8 <swi_wrapper__Fv+16>:	mrs	r2, SPSR
0x2018efc <swi_wrapper__Fv+20>:	stmdb	sp!, {r2}
0x2018f00 <swi_wrapper__Fv+24>:	bl	0x2018d08 <swi_handler__FiPUi>
0x2018f04 <swi_wrapper__Fv+28>:	ldmia	sp!, {r2}
0x2018f08 <swi_wrapper__Fv+32>:	msr	SPSR_fc, r2
0x2018f0c <swi_wrapper__Fv+36>:	ldmia	sp!, {r0, r1, r2, r3, pc}
End of assembler dump.

which is initialized by

*memPointer = (int) swi_wrapper;
memPointer = JUMP_DESTINATION_SWI; // 0x8
*memPointer= 0xe59ff010;

The swi_wrapper leads to :

void swi_handler(int swi_number, unsigned int * stack ) {
 	38	  static Logger swiLogger((int *) 0x100, (int *) 0x200);  
 	39	  int cpsr;
-	41	  switch(swi_number) {
 	42	  case REASON_CHANGE_TO_SV :
-	43	    os->osLogger->log("REASON_CHANGE_TO_SV",0);
-	44	    break;
 	45	  case REASON_SET_I:
-	46	    asm volatile ("mrs r0,cpsr": : :"r0");
-	47	    asm volatile ("orr r0, r0, #128": : :"r0");
-	48	    asm volatile ("msr cpsr, r0");
-	49	    asm volatile ("mrs %0, cpsr":"=r" (cpsr));
-	50	    os->osLogger->log("REASON_SET_I",cpsr);
-	51	    break;
 	52	  case REASON_UNSET_I:
-	53	    asm volatile ("mrs r0,cpsr": : :"r0");
-	54	    asm volatile ("and r0, r0, #0xffff7fff": : :"r0");
-	55	    asm volatile ("msr cpsr, r0");
-	56	    asm volatile ("mrs %0, cpsr":"=r" (cpsr));
-	57	    os->osLogger->log("REASON_UNSET_I",cpsr);
-	58	    break;
 	59	  case REASON_SET_F:
-	60	    asm volatile ("mrs r0,cpsr": : :"r0");
-	61	    asm volatile ("orr r0, r0, #64": : :"r0");
-	62	    asm volatile ("msr cpsr, r0");
-	63	    asm volatile ("mrs %0, cpsr":"=r" (cpsr));
-	64	    os->osLogger->log("REASON_SET_F",cpsr);
-	65	    break;
 	66	  case REASON_UNSET_F:
-	67	    asm volatile ("mrs r0,cpsr": : :"r0");
-	68	    asm volatile ("and r0, r0, #0xffffbfff": : :"r0");
-	69	    asm volatile ("msr cpsr, r0");
-	70	    asm volatile ("mrs %0, cpsr":"=r" (cpsr));
-	71	    os->osLogger->log("REASON_UNSET_F",cpsr);
-	72	    break;
 	73	  default :
-	74	    break;

The logging facility is tested and works fine on the aeb.

Is there still an error in the crt0.S file or could this be a bug of the gdb?
Thankīs for your patience with me :-),
The beginning of the crt0.S file with my modification:

//#include "swi.h"

/* ANSI concatenation macros.  */
#define CONCAT(a, b) CONCAT2(a, b)
#define CONCAT2(a, b) a ## b

#define FUNCTION( name ) CONCAT (__USER_LABEL_PREFIX__, name)
#error __USER_LABEL_PREFIX is not defined

/* .text is used instead of .section .text so it works with arm-aout too.  */
	.code 32
	.align 	0

	.global	_mainCRTStartup
	.global	_start
	.global	start

/* Start by setting up a stack */
	/*  Issue Demon SWI to read stack info */
	swi	SWI_GetEnv	/*  Returns command line in r0 */
	mov	sp,r1		/*  and the highest memory address in r1 */
	ldr	sl, .LC2	/*  stack limit is at end of data */
	add	sl, sl, #256	/*  allow slop for stack overflow handling */
				/*  and small frames */
	/*  Issue Angel SWI to read stack info */
	mov	r0, #AngelSWI_Reason_HeapInfo
	adr	r1, .LC0	/*  point at ptr to 4 words to receive data */
	swi	AngelSWI_ARM	/*  We are always in ARM mode for startup */
	ldr	r0, .LC0	/*  point at values read */
	ldr	sp, [r0, #8]
	ldr	sl, [r0, #12]
	add	sl, sl, #256	/*  allow slop for stack overflow handling */
				/*  and small frames */
	/*  Set up the stack pointer to a fixed value */
	@	modification, jens-christian
	@ begin
	// switch to user mode
	.equ MODE_BITS,        0x1F @ all mode bits from cpsr
	.equ USER_MODE,        0x10 @ b10000 is user mode
	@ initialize the stack pointer
	@ for SV mode
	@ set sp to the end of the RAM (eb01)
	mov	sp, #0x1000

	// switch to user mode
	mrs	r0, cpsr
	bic	r0, r0, #MODE_BITS
	orr	r0, r0, #USER_MODE
	msr	cpsr, r0
#endif //TARGET_SIM

	@ end
	ldr	r3, .LC0
	mov 	sp, r3
	/* Setup a default stack-limit in-case the code has been


Jens-Christian Lache
Technische Universitaet Hamburg-Harburg

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