Re: Unifying the x86 FPU register sets

[Jim Blandy <jimb at cygnus dot com>]

> > I'm not sure what you mean, here.  Do you want "info all-registers" to
> > print the opcode and the FPU instruction pointer selector as a single
> > word?
> 
> Yes, I think this is what "info all-registers" should do.

Why?  Because FSAVE stores them in the same 32-bit word?

In real-address mode, FSAVE stores them differently.  I don't think
the protected-mode FSAVE format reveals anything deep and profound
about the architecture.

Reading the manual gives one the impression that the FPU instruction
pointer, the FPU operand pointer, and the last instruction opcode are
three distinct registers.  The only place that associates the
instruction segment with the opcode at all is that diagram.  Since
a real-address FSAVE arranges it differently, I think it's only an
artifact of the packing that the two are placed together at all.

So I think the opcode and code segment should be separate registers.