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Re: [PATCH 4/5] RISC-V: Add native linux support.
- From: Jim Wilson <jimw at sifive dot com>
- To: John Baldwin <jhb at freebsd dot org>
- Cc: Andrew Burgess <andrew dot burgess at embecosm dot com>, Andreas Schwab <schwab at suse dot de>, gdb-patches at sourceware dot org
- Date: Thu, 25 Oct 2018 11:17:22 -0700
- Subject: Re: [PATCH 4/5] RISC-V: Add native linux support.
- References: <CAFyWVaZoF3a=-QjADoUdzq_hz5skHVaxmXtB1X5ZT-a_sns5PA@mail.gmail.com> <20180808233908.8149-1-jimw@sifive.com> <mvm8t2mpahm.fsf@suse.de> <20181025110946.GN2929@embecosm.com> <db9660fb-a22d-6123-a51a-e1570f8059a9@FreeBSD.org>
On Thu, Oct 25, 2018 at 10:55 AM John Baldwin <jhb@freebsd.org> wrote:
> Now that the MISA defaults to 0 if not present, would it better to just remove
> this and not set it to 0 explicitly? The FreeBSD native target for RISC-V
> doesn't set MISA to anything at all.
There is still the issue of FP register size, which comes from MISA,
unless perhaps we can get it from auxvec/hw-cap info. I was going to
look into that latter, and if the auxvec/hw-cap stuff works, then
remove the remaining MISA support in the riscv-linux-nat.c file.
Jim