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Re: [PATCH] gdb/riscv: Remove redundant code, and catch more errors when accessing MISA
- From: Jim Wilson <jimw at sifive dot com>
- To: Andrew Burgess <andrew dot burgess at embecosm dot com>
- Cc: gdb-patches at sourceware dot org, Palmer Dabbelt <palmer at sifive dot com>
- Date: Tue, 23 Oct 2018 09:30:20 -0700
- Subject: Re: [PATCH] gdb/riscv: Remove redundant code, and catch more errors when accessing MISA
- References: <20181023112631.9722-1-andrew.burgess@embecosm.com>
On Tue, Oct 23, 2018 at 4:26 AM Andrew Burgess
<andrew.burgess@embecosm.com> wrote:
> This is a cleanup of a patch I proposed here:
> https://sourceware.org/ml/gdb-patches/2018-09/msg00749.html
> I think Jim said he was happy with this, but this is a final chance to
> review.
Yes, I'm OK with this. Now that we check the target instruction to
determine breakpoint size, misa isn't a critical register anymore. We
still need a way to determine FP register size, but the linux kernel
only supports 64-bit FP registers or no FP registers, so the linux
target support doesn't need to worry about 32-bit FP registers yet.
When we do, we may be able to use the auxvec/hwcap info instead of
misa for that.
Jim