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Re: [PATCH] RISC-V: enable have_nonsteppable_watchpoint by default
> On Oct 8, 2018, at 10:25 AM, Joel Brobecker <brobecker@adacore.com> wrote:
>
>> [...] coupled with the fact that I'm not sure
>> whether there are in fact implementations of riscv that trigger
>> watchpoints after the write, makes me wonder, do we really need this?
>
> Actually - that's a very good point. Do we know of any architecture
> where the watchpoint triggers after the write?
I think MIPS is one. The documentation is not entirely clear but that's what I remember from using it.
paul