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[PATCH 1/3] Aarch64: Move pseudo defines to header
- From: Alan Hayward <alan dot hayward at arm dot com>
- To: gdb-patches at sourceware dot org
- Cc: nd at arm dot com, Alan Hayward <alan dot hayward at arm dot com>
- Date: Mon, 17 Sep 2018 13:53:12 +0100
- Subject: [PATCH 1/3] Aarch64: Move pseudo defines to header
- References: <20180917125314.71795-1-alan.hayward@arm.com>
gdb/ChangeLog:
2018-09-14 Alan Hayward <alan.hayward@arm.com>
* aarch64-tdep.c (AARCH64_Q0_REGNUM): Move to here.
(AARCH64_D0_REGNUM): Likewise.
(AARCH64_S0_REGNUM): Likewise.
(AARCH64_H0_REGNUM): Likewise.
(AARCH64_B0_REGNUM): Likewise.
(AARCH64_SVE_V0_REGNUM): Likewise.
* arch/aarch64.h (AARCH64_Q0_REGNUM): Move from here.
(AARCH64_D0_REGNUM): Likewise.
(AARCH64_S0_REGNUM): Likewise.
(AARCH64_H0_REGNUM): Likewise.
(AARCH64_B0_REGNUM): Likewise.
(AARCH64_SVE_V0_REGNUM): Likewise.
---
gdb/aarch64-tdep.c | 8 --------
gdb/arch/aarch64.h | 8 ++++++++
2 files changed, 8 insertions(+), 8 deletions(-)
diff --git a/gdb/aarch64-tdep.c b/gdb/aarch64-tdep.c
index d2e6ac64d5..6993e9061e 100644
--- a/gdb/aarch64-tdep.c
+++ b/gdb/aarch64-tdep.c
@@ -63,14 +63,6 @@
#define bit(obj,st) (((obj) >> (st)) & 1)
#define bits(obj,st,fn) (((obj) >> (st)) & submask ((fn) - (st)))
-/* Pseudo register base numbers. */
-#define AARCH64_Q0_REGNUM 0
-#define AARCH64_D0_REGNUM (AARCH64_Q0_REGNUM + AARCH64_D_REGISTER_COUNT)
-#define AARCH64_S0_REGNUM (AARCH64_D0_REGNUM + 32)
-#define AARCH64_H0_REGNUM (AARCH64_S0_REGNUM + 32)
-#define AARCH64_B0_REGNUM (AARCH64_H0_REGNUM + 32)
-#define AARCH64_SVE_V0_REGNUM (AARCH64_B0_REGNUM + 32)
-
/* A Homogeneous Floating-Point or Short-Vector Aggregate may have at most
four members. */
#define HA_MAX_NUM_FLDS 4
diff --git a/gdb/arch/aarch64.h b/gdb/arch/aarch64.h
index d6b88e6d56..ff9186007b 100644
--- a/gdb/arch/aarch64.h
+++ b/gdb/arch/aarch64.h
@@ -57,6 +57,14 @@ enum aarch64_regnum
AARCH64_LAST_V_ARG_REGNUM = AARCH64_V0_REGNUM + 7
};
+/* Pseudo register base numbers. */
+#define AARCH64_Q0_REGNUM 0
+#define AARCH64_D0_REGNUM (AARCH64_Q0_REGNUM + AARCH64_D_REGISTER_COUNT)
+#define AARCH64_S0_REGNUM (AARCH64_D0_REGNUM + 32)
+#define AARCH64_H0_REGNUM (AARCH64_S0_REGNUM + 32)
+#define AARCH64_B0_REGNUM (AARCH64_H0_REGNUM + 32)
+#define AARCH64_SVE_V0_REGNUM (AARCH64_B0_REGNUM + 32)
+
#define AARCH64_X_REGS_NUM 31
#define AARCH64_V_REGS_NUM 32
#define AARCH64_SVE_Z_REGS_NUM AARCH64_V_REGS_NUM
--
2.15.2 (Apple Git-101.1)