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[PATCH 1/2] sim: testsuite: Get common tests compiling again
- From: Stafford Horne <shorne at gmail dot com>
- To: GDB patches <gdb-patches at sourceware dot org>
- Cc: Stafford Horne <shorne at gmail dot com>
- Date: Thu, 5 Oct 2017 23:17:44 +0900
- Subject: [PATCH 1/2] sim: testsuite: Get common tests compiling again
- Authentication-results: sourceware.org; auth=none
- References: <20171005141745.27758-1-shorne@gmail.com>
This is a series of changes to the the old and non working sim common
testsuite . As far as I can tell this has not been used since what
looks like before 64-bit desktop computers became common. Most of the
changes here are to convert the test code to be 64-bit portable.
I have fixed this up in order to be able to use the fpu-tst test for
testing my new remainder function of the sim-fpu code. That means that
this does depend on having my remainder patch as well [0].
The fpu-tst tool actually depends on external code from v2 of berkeley
softfloat [1] and testfloat [2] libraries which I cleaned up so the
would actually build on a modern compiler. The build will generate a
'testfloat' binary which will be used to compare the sim-fpu vs the
softfloat implementation.
[0] https://sourceware.org/ml/gdb-patches/2017-10/msg00105.html
[1] https://github.com/stffrdhrn/berkeley-softfloat-2
[2] https://github.com/stffrdhrn/berkeley-testfloat-2
yyyy-mm-dd Stafford Horne <shorne@gmail.com>
* common/Makefile.in: Allow out of tree make. Fix fpu-tst
targets.
* common/alu-tst.c: Add includes to fix compile errors.
* common/bits-gen.c: Add includes to fix compile errors.
Changed 64 and 32 bit types to uit32_t and uint64_t to fix
compiler and runtime errors. Fixed generated code defines and
includes to fix compiler errors.
* common/bits-tst.c: Add includes to fix compile errors.
* common/fpu-tst.c: Add defines and includes to fix compile
errors.
(syst_float_flags_clear): New case for
sim_fpu_status_invalid_irx.
(syst_float_set_rounding_precision): New function.
(syst_int64_to_float64): New function.
(syst_int64_to_float32): New function.
(syst_float64_to_int64_round_to_zero): New function.
(syst_float32_to_int64_round_to_zero): New function.
(syst_float32_rem): New function.
(syst_float64_rem): New function.
---
sim/testsuite/common/Makefile.in | 53 +++++++++++++++++++---
sim/testsuite/common/alu-tst.c | 4 +-
sim/testsuite/common/bits-gen.c | 27 ++++++++----
sim/testsuite/common/bits-tst.c | 3 ++
sim/testsuite/common/fpu-tst.c | 94 +++++++++++++++++++++++++++++++++++++---
5 files changed, 158 insertions(+), 23 deletions(-)
diff --git a/sim/testsuite/common/Makefile.in b/sim/testsuite/common/Makefile.in
index d088501676..ce6a1ddd9d 100644
--- a/sim/testsuite/common/Makefile.in
+++ b/sim/testsuite/common/Makefile.in
@@ -1,5 +1,28 @@
+# Makefile for regression testing the GNU debugger.
+# Copyright (C) 1997-2017 Free Software Foundation, Inc.
+
+# This file is part of GDB.
+
+# This program is free software; you can redistribute it and/or modify
+# it under the terms of the GNU General Public License as published by
+# the Free Software Foundation; either version 3 of the License, or
+# (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program. If not, see <http://www.gnu.org/licenses/>.
+
+VPATH = @srcdir@:$(srccom)
+srcdir = @srcdir@
+srcroot = $(srcdir)/../../..
+srccom = $(srcdir)/../../common
+
CC=gcc
-CFLAGS = -Wall -Werror -I../../common -I../../../include -g
+CFLAGS = -Wall -Werror -I../../../bfd -I$(srccom) -I$(srcdir)/../../../include -g
default: check
@@ -10,29 +33,44 @@ all: bits32m0 bits32m31 bits64m0 bits64m63
bits32m0.c: bits-gen bits-tst.c
./bits-gen 32 0 big > tmp-bits32m0.c
- cat bits-tst.c >> tmp-bits32m0.c
+ cat $(srcdir)/bits-tst.c >> tmp-bits32m0.c
mv tmp-bits32m0.c bits32m0.c
bits32m31.c: bits-gen bits-tst.c
./bits-gen 32 31 little > tmp-bits32m31.c
- cat bits-tst.c >> tmp-bits32m31.c
+ cat $(srcdir)/bits-tst.c >> tmp-bits32m31.c
mv tmp-bits32m31.c bits32m31.c
bits64m0.c: bits-gen bits-tst.c
./bits-gen 64 0 big > tmp-bits64m0.c
- cat bits-tst.c >> tmp-bits64m0.c
+ cat $(srcdir)/bits-tst.c >> tmp-bits64m0.c
mv tmp-bits64m0.c bits64m0.c
bits64m63.c: bits-gen bits-tst.c
./bits-gen 64 63 little > tmp-bits64m63.c
- cat bits-tst.c >> tmp-bits64m63.c
+ cat $(srcdir)/bits-tst.c >> tmp-bits64m63.c
mv tmp-bits64m63.c bits64m63.c
-
# Verify SIM-FPU
#
+# The SIM-FPU test uses berkeley testfloat and softfloat not included
+# within GDB to test. They can be symlinked in to the binutils-gdb source
+# root if this testing is needed.
+#
#check: fpu-tst.ok
#all: fpu-tst
+CFLAGS += -I$(srcroot)/softfloat -I$(srcroot)/softfloat/include/x86-gcc
+CFLAGS += -I$(srcroot)/testfloat
+
+VPATH += $(srcroot)/softfloat:$(srcroot)/testfloat
+fpu-tst: testfloat
+ echo './testfloat -all' > fpu-tst
+ chmod 755 fpu-tst
+fpu-tst.o: sim-fpu.c sim-bits.c
+testfloat: fpu-tst.o \
+ testfloat.o random.o fail.o writeHex.o \
+ testLoops.o testFunction.o testCases.o \
+ softfloat.o
# Verify SIM-ALU
@@ -43,9 +81,10 @@ alu-tst.o: alu-tst.c alu-n-tst.h
clean:
rm -f *.o
rm -f *.ok
- rm -f bits32m0 bits32m31 bits64m0 bits64m63 bits-gen
+ rm -f bits32m0* bits32m31* bits64m0* bits64m63* bits-gen
rm -f tmp-*
rm -f alu-tst
+ rm -f fpu-tst testfloat
.SUFIXES: .ok
%.ok: %
diff --git a/sim/testsuite/common/alu-tst.c b/sim/testsuite/common/alu-tst.c
index e7fffe502c..7524fe0961 100644
--- a/sim/testsuite/common/alu-tst.c
+++ b/sim/testsuite/common/alu-tst.c
@@ -14,10 +14,12 @@
#define SIM_BITS_INLINE (INCLUDE_MODULE | INCLUDED_BY_MODULE)
+#include "config.h"
+
#include <string.h>
+#include <stdlib.h>
#include "sim-basics.h"
-
#include "sim-alu.h"
#include <stdio.h>
diff --git a/sim/testsuite/common/bits-gen.c b/sim/testsuite/common/bits-gen.c
index a481b33be4..d1a385c7ee 100644
--- a/sim/testsuite/common/bits-gen.c
+++ b/sim/testsuite/common/bits-gen.c
@@ -18,7 +18,10 @@ You should have received a copy of the GNU General Public License
along with this program. If not, see <http://www.gnu.org/licenses/>. */
+#include <stdlib.h>
+#include <stdint.h>
#include <stdio.h>
+#include <string.h>
void
@@ -56,7 +59,7 @@ gen_bit (int bitsize,
for (i = 0; i < nr_bits; i++)
{
/* compute what we think the value is */
- unsigned long long bit = 1;
+ uint64_t bit = 1;
if (msb == 0)
bit <<= nr_bits - i - 1;
else
@@ -67,8 +70,8 @@ gen_bit (int bitsize,
printf (" { __LINE__, ");
printf ("%d, %2d, ", -1, i);
printf ("%s (%2d), ", macro, i);
- printf ("UNSIGNED64 (0x%08lx%08lx), ",
- (long) (bit >> 32), (long) bit);
+ printf ("UNSIGNED64 (0x%08x%08x), ",
+ (int32_t) (bit >> 32), (int32_t) bit);
printf ("},\n");
}
printf ("};\n");
@@ -117,11 +120,11 @@ gen_mask (int bitsize,
|| (strcmp (macro, "") == 0))
{
/* compute the mask */
- unsigned long long mask = 0;
+ uint64_t mask = 0;
int b;
for (b = 0; b < nr_bits; b++)
{
- unsigned long long bit = 1;
+ uint64_t bit = 1;
if (strcmp (msb, "MS") == 0)
{
if ((l <= b && b <= h)
@@ -141,11 +144,11 @@ gen_mask (int bitsize,
mask |= bit;
}
if (bitsize == 32)
- mask = (unsigned long) mask;
+ mask = (uint32_t) mask;
printf ("%d, %d, ", l, h);
printf ("%s%s (%2d, %2d), ", msb, macro, l, h);
- printf ("UNSIGNED64 (0x%08lx%08lx), ",
- (long) (mask >> 32), (long) mask);
+ printf ("UNSIGNED64 (0x%08x%08x), ",
+ (int32_t) (mask >> 32), (int32_t) mask);
}
else
printf ("-1, -1, ");
@@ -185,6 +188,7 @@ usage (int reason)
fprintf (stderr, "Invalid <byte-order> argument\n");
break;
default:
+ break;
}
exit (1);
@@ -231,14 +235,19 @@ main (int argc, char *argv[])
usage (4);
printf ("#define WITH_TARGET_WORD_BITSIZE %d\n", bitsize);
+ printf ("#define WITH_TARGET_ADDRESS_BITSIZE %d\n", bitsize);
+ printf ("#define WITH_TARGET_CELL_BITSIZE %d\n", bitsize);
printf ("#define WITH_TARGET_WORD_MSB %d\n", msb);
- printf ("#define WITH_HOST_WORD_BITSIZE %d\n", sizeof (int) * 8);
+ printf ("#define WITH_HOST_WORD_BITSIZE %ld\n", sizeof (int) * 8);
printf ("#define WITH_TARGET_BYTE_ORDER %s\n", big_endian ? "BFD_ENDIAN_BIG" : "BFD_ENDIAN_LITTLE");
printf ("\n");
printf ("#define SIM_BITS_INLINE (ALL_H_INLINE)\n");
printf ("\n");
printf ("#define ASSERT(X) do { if (!(X)) abort(); } while (0)\n");
printf ("\n");
+ printf ("#include \"config.h\"\n");
+ printf ("#include <stdlib.h>\n");
+ printf ("#include <string.h>\n");
printf ("#include \"sim-basics.h\"\n");
gen_struct ();
diff --git a/sim/testsuite/common/bits-tst.c b/sim/testsuite/common/bits-tst.c
index 5a4210a76a..3a7a6db38b 100644
--- a/sim/testsuite/common/bits-tst.c
+++ b/sim/testsuite/common/bits-tst.c
@@ -1,5 +1,8 @@
# 2 "bits-tst.c"
+#include <stdlib.h>
+#include <string.h>
+
/* Drive the bit test routines */
diff --git a/sim/testsuite/common/fpu-tst.c b/sim/testsuite/common/fpu-tst.c
index d347e12727..0ccc34640a 100644
--- a/sim/testsuite/common/fpu-tst.c
+++ b/sim/testsuite/common/fpu-tst.c
@@ -1,3 +1,11 @@
+#define WITH_TARGET_WORD_BITSIZE 64
+#define WITH_TARGET_ADDRESS_BITSIZE 64
+#define WITH_TARGET_CELL_BITSIZE 64
+#define WITH_TARGET_WORD_MSB 0
+#define WITH_HOST_WORD_BITSIZE 32
+#define WITH_TARGET_BYTE_ORDER BFD_ENDIAN_BIG
+#define DEFAULT_INLINE 0
+
#define ASSERT(EXPRESSION) \
do { \
if (!(EXPRESSION)) { \
@@ -7,21 +15,22 @@ do { \
} \
} while (0)
-#define SIM_BITS_INLINE (INCLUDE_MODULE | INCLUDED_BY_MODULE)
+#include "config.h"
+#include <stdlib.h>
+/* From SoftFloat and TestFloat. */
#include "milieu.h"
#include "softfloat.h"
#include "systfloat.h"
#include "systmodes.h"
-/* #define SIM_FPU_INLINE (INCLUDE_MODULE | INCLUDED_BY_MODULE) */
-
-
+#include "sim-types.h"
+#include "sim-inline.h"
#include "sim-bits.h"
#include "sim-fpu.h"
-#include "sim-fpu.c"
-
+#include "sim-fpu.c"
+#include "sim-bits.c"
static int flags;
@@ -45,6 +54,7 @@ syst_float_flags_clear ()
case sim_fpu_status_invalid_cvi:
case sim_fpu_status_invalid_cmp:
case sim_fpu_status_invalid_sqrt:
+ case sim_fpu_status_invalid_irx:
old_flags |= float_flag_invalid; /* v */
break;
case sim_fpu_status_inexact:
@@ -91,6 +101,10 @@ syst_float_set_rounding_mode(int8 mode)
}
}
+void
+syst_float_set_rounding_precision (int8 precision)
+{
+}
float32
syst_int32_to_float32(int32 a)
@@ -113,6 +127,26 @@ syst_int32_to_float64( int32 a )
return z;
}
+float64
+syst_int64_to_float64 (int64 a)
+{
+ float64 z;
+ sim_fpu s;
+ flags |= sim_fpu_i64to (&s, a, rounding_mode);
+ sim_fpu_to64 (&z, &s);
+ return z;
+}
+
+float32
+syst_int64_to_float32 (int64 a)
+{
+ float32 z;
+ sim_fpu s;
+ flags |= sim_fpu_i64to (&s, a, rounding_mode);
+ sim_fpu_to32 (&z, &s);
+ return z;
+}
+
int32
syst_float32_to_int32_round_to_zero( float32 a )
{
@@ -123,6 +157,26 @@ syst_float32_to_int32_round_to_zero( float32 a )
return z;
}
+int64
+syst_float64_to_int64_round_to_zero (float64 a)
+{
+ int64 z;
+ sim_fpu s;
+ sim_fpu_64to (&s, a);
+ flags |= sim_fpu_to64i (&z, &s, sim_fpu_round_zero);
+ return z;
+}
+
+int64
+syst_float32_to_int64_round_to_zero (float32 a)
+{
+ int64 z;
+ sim_fpu s;
+ sim_fpu_32to (&s, a);
+ flags |= sim_fpu_to64i (&z, &s, sim_fpu_round_zero);
+ return z;
+}
+
float64
syst_float32_to_float64 (float32 a)
{
@@ -224,6 +278,34 @@ float32 syst_float32_div( float32 a, float32 b )
return z;
}
+float32
+syst_float32_rem (float32 a, float32 b)
+{
+ float32 z;
+ sim_fpu A;
+ sim_fpu B;
+ sim_fpu ans;
+ sim_fpu_32to (&A, a);
+ sim_fpu_32to (&B, b);
+ flags |= sim_fpu_rem (&ans, &A, &B);
+ sim_fpu_to32 (&z, &ans);
+ return z;
+}
+
+float64
+syst_float64_rem (float64 a, float64 b)
+{
+ float64 z;
+ sim_fpu A;
+ sim_fpu B;
+ sim_fpu ans;
+ sim_fpu_64to (&A, a);
+ sim_fpu_64to (&B, b);
+ flags |= sim_fpu_rem (&ans, &A, &B);
+ sim_fpu_to64 (&z, &ans);
+ return z;
+}
+
float32 syst_float32_sqrt( float32 a )
{
float32 z;
--
2.13.5