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[PATCH v2] Fix inferior memory reading in GDBServer for arm/aarch32
- From: Antoine Tremblay <antoine dot tremblay at ericsson dot com>
- To: <qiyaoltc at gmail dot co>
- Cc: <gdb-patches at sourceware dot org>, Antoine Tremblay <antoine dot tremblay at ericsson dot com>
- Date: Fri, 9 Dec 2016 07:21:49 -0500
- Subject: [PATCH v2] Fix inferior memory reading in GDBServer for arm/aarch32
- Authentication-results: sourceware.org; auth=none
- References: <20161209120558.GF13661@E107787-LIN>
In this v2:
* Added more explainations to the commit log
Yao are you ok with the changes in the other functions too ? (for good practice ? )
I could make it another patch for them too... not sure.
-
Before this patch, some functions would read the inferior memory with
(*the_target)->read_memory, which returns the raw memory, rather than the
shadowed memory.
This is wrong since these functions do not expect to read a breakpoint
instruction and can lead to invalid behavior.
Use of raw memory in get_next_pcs_read_memory_unsigned_integer for example
could lead to get_next_pc returning an invalid pc.
Here's how this would happen:
In non-stop:
the user issues:
thread 1
step&
thread 2
step&
thread 3
step&
In a similar way as non-stop-fair-events.exp (threads are looping).
GDBServer:
linux_resume is called
GDBServer has pending events,
threads are not resumed and single-step breakpoint for thread 1 not installed.
linux_wait_1 is called with a pending event on thread 2 at pc A
GDBServer handles the event and calls proceed_all_lwps
This calls proceed_one_lwp and installs single-step breakpoints on all
the threads that need one.
Now since thread 1 needs to install a single-step breakpoint and is at pc B
(different than thread 2), a step-over is not initiated and get_next_pc
is called to figure out the next instruction from pc B.
However it may just be that thread 3 as a single step breakpoint at pc
B. And thus get_next_pc fails.
This situation is tested with non-stop-fair-events.exp.
In other words, single-step breakpoints are installed in proceed_one_lwp
for each thread. GDBserver proceeds two threads for resume_step, as
requested by GDB, and the thread proceeded later may see the single-step
breakpoints installed for the thread proceeded just now.
Tested on gdbserver-native/-m{thumb,arm} no regressions.
gdb/gdbserver/ChangeLog:
* linux-aarch32-low.c (arm_breakpoint_kind_from_pc): Use
target_read_memory.
* linux-arm-low.c (get_next_pcs_read_memory_unsigned_integer): Likewise.
(arm_sigreturn_next_pc): Likewise.
(get_next_pcs_syscall_next_pc): Likewise.
(arm_get_syscall_trapinfo): Likewise.
---
gdb/gdbserver/linux-aarch32-low.c | 4 ++--
gdb/gdbserver/linux-arm-low.c | 13 +++++++------
2 files changed, 9 insertions(+), 8 deletions(-)
diff --git a/gdb/gdbserver/linux-aarch32-low.c b/gdb/gdbserver/linux-aarch32-low.c
index 5547cf6491..4ff34b626b 100644
--- a/gdb/gdbserver/linux-aarch32-low.c
+++ b/gdb/gdbserver/linux-aarch32-low.c
@@ -237,11 +237,11 @@ arm_breakpoint_kind_from_pc (CORE_ADDR *pcptr)
*pcptr = UNMAKE_THUMB_ADDR (*pcptr);
/* Check whether we are replacing a thumb2 32-bit instruction. */
- if ((*the_target->read_memory) (*pcptr, buf, 2) == 0)
+ if (target_read_memory (*pcptr, buf, 2) == 0)
{
unsigned short inst1 = 0;
- (*the_target->read_memory) (*pcptr, (gdb_byte *) &inst1, 2);
+ target_read_memory (*pcptr, (gdb_byte *) &inst1, 2);
if (thumb_insn_size (inst1) == 4)
return ARM_BP_KIND_THUMB2;
}
diff --git a/gdb/gdbserver/linux-arm-low.c b/gdb/gdbserver/linux-arm-low.c
index ed9b3562a8..b8365cf0b9 100644
--- a/gdb/gdbserver/linux-arm-low.c
+++ b/gdb/gdbserver/linux-arm-low.c
@@ -263,7 +263,8 @@ get_next_pcs_read_memory_unsigned_integer (CORE_ADDR memaddr,
ULONGEST res;
res = 0;
- (*the_target->read_memory) (memaddr, (unsigned char *) &res, len);
+ target_read_memory (memaddr, (unsigned char *) &res, len);
+
return res;
}
@@ -769,15 +770,15 @@ arm_sigreturn_next_pc (struct regcache *regcache, int svc_number,
gdb_assert (svc_number == __NR_sigreturn || svc_number == __NR_rt_sigreturn);
collect_register_by_name (regcache, "sp", &sp);
- (*the_target->read_memory) (sp, (unsigned char *) &sp_data, 4);
+ target_read_memory (sp, (unsigned char *) &sp_data, 4);
pc_offset = arm_linux_sigreturn_next_pc_offset
(sp, sp_data, svc_number, __NR_sigreturn == svc_number ? 1 : 0);
- (*the_target->read_memory) (sp + pc_offset, (unsigned char *) &next_pc, 4);
+ target_read_memory (sp + pc_offset, (unsigned char *) &next_pc, 4);
/* Set IS_THUMB according the CPSR saved on the stack. */
- (*the_target->read_memory) (sp + pc_offset + 4, (unsigned char *) &cpsr, 4);
+ target_read_memory (sp + pc_offset + 4, (unsigned char *) &cpsr, 4);
*is_thumb = ((cpsr & CPSR_T) != 0);
return next_pc;
@@ -804,7 +805,7 @@ get_next_pcs_syscall_next_pc (struct arm_get_next_pcs *self)
unsigned long this_instr;
unsigned long svc_operand;
- (*the_target->read_memory) (pc, (unsigned char *) &this_instr, 4);
+ target_read_memory (pc, (unsigned char *) &this_instr, 4);
svc_operand = (0x00ffffff & this_instr);
if (svc_operand) /* OABI. */
@@ -965,7 +966,7 @@ arm_get_syscall_trapinfo (struct regcache *regcache, int *sysno)
collect_register_by_name (regcache, "pc", &pc);
- if ((*the_target->read_memory) (pc - 4, (unsigned char *) &insn, 4))
+ if (target_read_memory (pc - 4, (unsigned char *) &insn, 4))
*sysno = UNKNOWN_SYSCALL;
else
{
--
2.11.0