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On 17 Nov 2016 23:13, Maciej W. Rozycki wrote: > On Fri, 11 Nov 2016, Mike Frysinger wrote: > > --- a/sim/mips/mips.igen > > +++ b/sim/mips/mips.igen > > @@ -496,6 +496,7 @@ > > *vr5000: > > *vr5400: > > *vr5500: > > +*r3900: > > { > > // The check should be similar to mips64 for any with PX/UX bit equivalents. > > } > > This looks wrong to me -- as far as the instruction set is concerned the > TX39 family members are all 32-bit MIPS I processors with some extensions > (branch likelies, MADD/U, CACHE, SYNC, DERET and SDBBP, except the latter > all compatibly encoded) and load interlocking (no load delay slots) [1] -- > so mostly like `mipsI' -- and therefore `check_u64' shouldn't be called in > the first place. > > If the simulator fails to build, then the bug must be elsewhere, e.g. why > are DMFC1 and DMTC1 marked for `r3900' given that there are no 64-bit GPRs > that could be used by these instructions -- a misapplied patch hunk in a > distant past perhaps? > > It looks to me like this change needs be reverted and the `r3900' marking > removed from DMFC1/DMTC1 encodings and their dependencies instead. the mips ISAs are too varied for me to try and dive in and find the right answer, and you're certainly way more familiar than i here. so whatever you want to do here is fine :). -mike
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