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Re: [PATCH v3] arc: New Synopsys ARC port

> From: Anton Kolesov <>
> Cc: Anton Kolesov <>,
> 	Francois Bedard <>,
> 	Pedro Alves <>,
> 	Eli Zaretskii <>
> Date: Mon, 19 Sep 2016 15:36:38 +0300
> Changes in V3:
>     * Documentation fixes.
>     * Fix invalid filenames in features/Makefile.
>     * Remove all explicit regnums registers from XML features.  Requirement for
>       those specific regnums was removed in V2 of this patch, but XML files
>       haven't been updated for V2.
>     * Remove LP_START and LP_END from XML features, because they are not
>       required.
>     * C files were regenerated with new XML sources.

The documentation is approved with one minor nit:

> +ARC processors are highly configurable, so even core registers and their number
> +are not completely predetermined.  In addition flags and PC registers which are
> +important to @value{GDBN} are not "core" registers in ARC.  It is required that

Please use ``core'' instead, it produces a nicer output.


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