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Re: [PATCH] (ARM Cortex-M) FPU and PSP aware exception frame unwinder


[Adding a few folks who either worked on or expressed
interest in this before.]

On 04/07/2016 11:07 PM, James-Adam Renquinha Henri wrote:
> I submitted it as a bug to the GNU ARM Embedded initially, see here for
> details:
> Basically, this patch allow gdb to unwind properly an extended stack
> frame, that is an exception frame with FPU state stacked. Additionally,
> because all Cortex-M variants have 2 stack pointers, the Main Stack
> Pointer (MSP) and the Process Stack Pointer (PSP), the code in the patch
> also check which stack was used prior to the exception. That way,
> backtraces work beautifully.
> In my original submission, I mentioned a known issue that I didn't try
> to fix *yet*, because that would involve a lot more work, and the impact
> is relatively minor: for a given outer frame, some FPU registers may not
> be reported correctly. I hope you don't mind too much. I consider the
> current patch still useful, because at least backtraces work, and it's
> an annoyance not to be able to get them.

Thanks for the patch.  However, we should really add new target
descriptions/features that describe these registers to gdb
instead of looking them up by name.  Please see:

And see more in this earlier attempt at getting the unwinder working:

Tristan also wrote yet another patch for the same, as mentioned at:

Tristan, did you ever manage to post that?

Lots of duplicated effort.  :-/  :-(

Pedro Alves

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