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Re: cortex-m xml register descriptions for m-system
- From: Christopher Friedt <chrisfriedt at gmail dot com>
- To: Pedro Alves <palves at redhat dot com>, Yao Qi <qiyaoltc at gmail dot com>, gdb-patches at sourceware dot org, Tristan Gingold <gingold at adacore dot com>
- Date: Tue, 15 Dec 2015 10:35:17 -0500
- Subject: Re: cortex-m xml register descriptions for m-system
- Authentication-results: sourceware.org; auth=none
- References: <CAF4BF-RuPwFWfDa2Sp7MzYjF8bo1K3xb=jMThSpK4T7gTe+whQ at mail dot gmail dot com> <566F108D dot 1000401 at redhat dot com> <CAF4BF-TUH0V4=YY07u9n3q=dMecbjMr9cOrEm=2BDXeP3HrDQQ at mail dot gmail dot com> <566F5B1A dot 8040703 at redhat dot com>
Just so we can have consensus, please indicate what you think is the
best solution - Pedro, Yao, & Tristan.
Based on Tristan's feedback as well, it confirms that these registers
are necessary for DWARF handling.
On Mon, Dec 14, 2015 at 7:13 PM, Pedro Alves <palves@redhat.com> wrote:
> <!DOCTYPE feature SYSTEM "gdb-target.dtd">
> <feature name="org.gnu.gdb.arm.m-profile">
> <reg name="r0" bitsize="32"/>
> <reg name="r1" bitsize="32"/>
> <reg name="r2" bitsize="32"/>
> <reg name="r3" bitsize="32"/>
> <reg name="r4" bitsize="32"/>
> <reg name="r5" bitsize="32"/>
> <reg name="r6" bitsize="32"/>
> <reg name="r7" bitsize="32"/>
> <reg name="r8" bitsize="32"/>
> <reg name="r9" bitsize="32"/>
> <reg name="r10" bitsize="32"/>
> <reg name="r11" bitsize="32"/>
> <reg name="r12" bitsize="32"/>
> <reg name="sp" bitsize="32" type="data_ptr"/>
> <reg name="lr" bitsize="32"/>
> <reg name="pc" bitsize="32" type="code_ptr"/>
> <reg name="xpsr" bitsize="32"/>
>
> <!-- System registers below. Note these are not
> _required_ by org.gnu.gdb.arm.m-profile. -->
> <reg name="msp" bitsize="32" type="data_ptr"/>
> <reg name="psp" bitsize="32" type="data_ptr"/>
> <reg name="primask" bitsize="1" type="int8"/>
> <reg name="basepri" bitsize="8" type="int8"/>
> <reg name="faultmask" bitsize="1" type="int8"/>
> <reg name="control" bitsize="3" type="int8"/>
> </feature>
I do like Pedro's suggestion. The above XML could be called arm-7m-profile.xml .
Based on Yao's feedback and the ARMv6M A.R.M., I would also suggest
something like the following for arm-6m-profile.xml.
Please note, I suggest using adding regnum="25" for the xpsr in both cases.
<!DOCTYPE feature SYSTEM "gdb-target.dtd">
<feature name="org.gnu.gdb.arm.m-profile">
<reg name="r0" bitsize="32"/>
<reg name="r1" bitsize="32"/>
<reg name="r2" bitsize="32"/>
<reg name="r3" bitsize="32"/>
<reg name="r4" bitsize="32"/>
<reg name="r5" bitsize="32"/>
<reg name="r6" bitsize="32"/>
<reg name="r7" bitsize="32"/>
<reg name="r8" bitsize="32"/>
<reg name="r9" bitsize="32"/>
<reg name="r10" bitsize="32"/>
<reg name="r11" bitsize="32"/>
<reg name="r12" bitsize="32"/>
<reg name="sp" bitsize="32" type="data_ptr"/>
<reg name="lr" bitsize="32"/>
<reg name="pc" bitsize="32" type="code_ptr"/>
<reg name="xpsr" bitsize="32" regnum="25"/>
<!-- System registers below. Note these are not
_required_ by org.gnu.gdb.arm.m-profile. -->
<reg name="msp" bitsize="32" type="data_ptr"/>
<reg name="psp" bitsize="32" type="data_ptr"/>
<reg name="primask" bitsize="1" type="int8"/>
<!-- Slack for unused basepri and faultmask registers.
See arm-fpa.xml. -->
<reg name="" bitsize="8" type="int8" regnum="16"/>
<reg name="" bitsize="8" type="int8" regnum="16"/>
<reg name="control" bitsize="3" type="int8"/>
</feature>
It borrows from arm-with-m-fpa-layout.xml in that it specifies some
nameless registers (which I assume are ignored by gdb - Pedro, can you
confirm?). The benefit is that the regnum fields of the 6m and 7m
profiles would align easily, simplifying stub implementation. It's a
bit messy though.
Let's call the above 'option A'.
Let's call the alternative below 'option B'.
Common / base case for all ARM Cortex-M devices
arm-m-profile.xml
<!DOCTYPE feature SYSTEM "gdb-target.dtd">
<feature name="org.gnu.gdb.arm.m-profile">
<reg name="r0" bitsize="32"/>
<reg name="r1" bitsize="32"/>
<reg name="r2" bitsize="32"/>
<reg name="r3" bitsize="32"/>
<reg name="r4" bitsize="32"/>
<reg name="r5" bitsize="32"/>
<reg name="r6" bitsize="32"/>
<reg name="r7" bitsize="32"/>
<reg name="r8" bitsize="32"/>
<reg name="r9" bitsize="32"/>
<reg name="r10" bitsize="32"/>
<reg name="r11" bitsize="32"/>
<reg name="r12" bitsize="32"/>
<reg name="sp" bitsize="32" type="data_ptr"/>
<reg name="lr" bitsize="32"/>
<reg name="pc" bitsize="32" type="code_ptr"/>
<reg name="xpsr" bitsize="32" regnum="25"/>
<!-- System registers below. Note these are not
_required_ by org.gnu.gdb.arm.m-profile. -->
<reg name="msp" bitsize="32" type="data_ptr"/>
<reg name="psp" bitsize="32" type="data_ptr"/>
<reg name="primask" bitsize="1" type="int8"/>
<reg name="control" bitsize="3" type="int8"/>
</feature>
Additional registers for ARMv7M
arm-7m-profile.xml
<!DOCTYPE feature SYSTEM "gdb-target.dtd">
<feature name="org.gnu.gdb.arm.m-profile">
<reg name="r0" bitsize="32"/>
<reg name="r1" bitsize="32"/>
<reg name="r2" bitsize="32"/>
<reg name="r3" bitsize="32"/>
<reg name="r4" bitsize="32"/>
<reg name="r5" bitsize="32"/>
<reg name="r6" bitsize="32"/>
<reg name="r7" bitsize="32"/>
<reg name="r8" bitsize="32"/>
<reg name="r9" bitsize="32"/>
<reg name="r10" bitsize="32"/>
<reg name="r11" bitsize="32"/>
<reg name="r12" bitsize="32"/>
<reg name="sp" bitsize="32" type="data_ptr"/>
<reg name="lr" bitsize="32"/>
<reg name="pc" bitsize="32" type="code_ptr"/>
<reg name="xpsr" bitsize="32" regnum="25"/>
<!-- System registers below. Note these are not
_required_ by org.gnu.gdb.arm.m-profile. -->
<reg name="msp" bitsize="32" type="data_ptr"/>
<reg name="psp" bitsize="32" type="data_ptr"/>
<reg name="primask" bitsize="1" type="int8"/>
<reg name="control" bitsize="3" type="int8"/>
<reg name="basepri" bitsize="8" type="int8"/>
<reg name="faultmask" bitsize="1" type="int8"/>
</feature>
If we can improve 'option B' via <xi:include> and reuse
arm-m-profile.xml, please let me know.
Thanks,
C