This is the mail archive of the
mailing list for the GDB project.
Re: [PATCH v7.1] Support software single step on ARM in GDBServer.
- From: Antoine Tremblay <antoine dot tremblay at ericsson dot com>
- To: Yao Qi <qiyaoltc at gmail dot com>
- Cc: Pedro Alves <palves at redhat dot com>, <gdb-patches at sourceware dot org>
- Date: Fri, 11 Dec 2015 11:11:12 -0500
- Subject: Re: [PATCH v7.1] Support software single step on ARM in GDBServer.
- Authentication-results: sourceware.org; auth=none
- References: <1449583641-18156-7-git-send-email-antoine dot tremblay at ericsson dot com> <1449691701-11845-1-git-send-email-antoine dot tremblay at ericsson dot com> <8637v9qc50 dot fsf at gmail dot com> <566AE65E dot 5080209 at ericsson dot com> <86twnpov11 dot fsf at gmail dot com>
On 12/11/2015 10:38 AM, Yao Qi wrote:
Antoine Tremblay <email@example.com> writes:
I'm not sure a macro is a good thing, it often makes the code harder
to parse for ides/emacs etc...
Why macro is bad?
Well in my view, I write a macro when there's no other way to write what
I want to write or the macro is generic enough to be used freely in many
places like MAKE_THUMB_ADDR.
In this case there is a way to avoid a macro, I can add a local variable
with shorter name, or maybe I could just rename the original operation
It's still 12 more but it avoids the macro and should be short enough.
How about that?
And I don't think shortening the lines is a good justification in
general for a macro.
It is! Supposing we have a macro like this ...
#define ARM_READ_UINT(MEMADDR, LEN, BYTE_ORDER) \
self->ops->read_memory_unsigned_integer ((MEMADDR), (LEN), (BYTE_ORDER))
I don't like that the macro assumes a very specific context and this
context is not reflected in the name.
I find it confusing if somebody saw the macro ARM_READ_UINT he might
think it's possible to use as a general macro in the file but it's not.
I think the best solution is to rename the ops to read_mem_uint.
How about I use a function pointer variable like :
ULONGEST (*read_memory_uint) (CORE_ADDR memaddr, int len, int byte_order);
read_memory_uint = self->ops->read_memory_unsigned_integer;
That would be already 23 shorter.
+ loc += 2;
+ if (!((insn1 & 0xfff0) == 0xe850
+ || ((insn1 & 0xfff0) == 0xe8d0 && (insn2 & 0x00c0) == 0x0040)))
+ return NULL;
+ /* Assume that no atomic sequence is longer than "atomic_sequence_length"
+ instructions. */
+ for (insn_count = 0; insn_count < atomic_sequence_length; ++insn_count)
+ = self->ops->read_memory_unsigned_integer (loc, 2,byte_order_for_code);
+ loc += 2;
+ if (thumb_insn_size (insn1) != 4)
+ /* Assume that there is at most one conditional branch in the
+ atomic sequence. If a conditional branch is found, put a
+ breakpoint in its destination address. */
+ if ((insn1 & 0xf000) == 0xd000 && bits (insn1, 8, 11) != 0x0f)
+ if (last_breakpoint > 0)
+ return NULL; /* More than one conditional branch found,
+ fallback to the standard code. */
+ breaks = loc + 2 + (sbits (insn1, 0, 7) << 1);
+ /* We do not support atomic sequences that use any *other*
+ instructions but conditional branches to change the PC.
+ Fall back to standard code to avoid losing control of
+ execution. */
+ else if (thumb_instruction_changes_pc (insn1))
+ return NULL;
+ insn2 = self->ops->read_memory_unsigned_integer
+ (loc, 2, byte_order_for_code);
Format looks wrong, multiple instances of this problem in the patch.
Yes actually I was not sure about that and discussed this with Pedro
and he agreed this was ok. That's why I went with that.
At some point when you have
long_function_name (long variable,
And that does not fit you could have
long variable, ... )
(long variable, ...)
... then, this problem doesn't exist at all. Isn't it better below?
insn2 = ARM_READ_UINT (loc, 2, byte_order_for_code);