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[PATCH] Recognize branch instruction on MIPS in gdb.trace/entry-values.exp
- From: Yao Qi <yao at codesourcery dot com>
- To: <gdb-patches at sourceware dot org>
- Date: Mon, 29 Dec 2014 16:14:21 +0800
- Subject: [PATCH] Recognize branch instruction on MIPS in gdb.trace/entry-values.exp
- Authentication-results: sourceware.org; auth=none
The test entry-values.exp doesn't recognize the call instruction "jal"
on MIPS, so this patch sets call_insn "jal" first.
Currently, we assume the next instruction address of call instruction
is the address returned from foo, however it is not correct on MIPS
which has delay slot. We extend variable call_insn to match one
instruction after jal, so that $returned_from_foo is correct on MIPS.
All tests in entry-values.exp are PASS.
gdb/testsuite:
2014-12-29 Yao Qi <yao@codesourcery.com>
* gdb.trace/entry-values.exp: Set call_insn for MIPS target.
---
gdb/testsuite/gdb.trace/entry-values.exp | 10 ++++++++++
1 file changed, 10 insertions(+)
diff --git a/gdb/testsuite/gdb.trace/entry-values.exp b/gdb/testsuite/gdb.trace/entry-values.exp
index 6bb0514..bf395f7 100644
--- a/gdb/testsuite/gdb.trace/entry-values.exp
+++ b/gdb/testsuite/gdb.trace/entry-values.exp
@@ -43,6 +43,16 @@ if { [istarget "arm*-*-*"] || [istarget "aarch64*-*-*"] } {
set call_insn "brasl"
} elseif { [istarget "powerpc*-*-*"] } {
set call_insn "bl"
+} elseif { [istarget "mips*-*-*"] } {
+ # Skip one instruction after jal which is the delay slot.
+ #
+ # jal foo
+ # insn1
+ # insn2
+ #
+ # program goes to insn2 when it returns from foo. We should set
+ # RETURNED_FROM_FOO to insn2.
+ set call_insn "jal\[^\r\n\]+\r\n"
} else {
set call_insn "call"
}
--
1.9.3