[PATCH V3 3/3] Add AVX512 feature description to GDB manual

[Michael Sturm <michael dot sturm at intel dot com>]

2013-09-11  Michael Sturm  <michael.sturm@intel.com>
            Walfred Tedeschi  <walfred.tedeschi@intel.com>

     * NEWS: Add note about new support for AVX512.
doc/
     * gdb.texinfo (i386 Features): Add description of AVX512
     registers.

---
 gdb/NEWS            |  5 +++++
 gdb/doc/gdb.texinfo | 34 ++++++++++++++++++++++++++++++++++
 2 files changed, 39 insertions(+)

diff --git a/gdb/NEWS b/gdb/NEWS
index b54a414..b0ba77c 100644
--- a/gdb/NEWS
+++ b/gdb/NEWS
@@ -5674,3 +5674,8 @@ Host is the machine where GDB will run; targ is the machine
 where the program that you are debugging will run.
 
  *  GDB now supports access to Intel(R) MPX registers on GNU/Linux.
+
+ *  Support for Intel(R) AVX-512 registers on GNU/Linux.
+
+Support displaying and modifying Intel(R) AVX-512 registers $zmm0 - $zmm31 and
+$k0 - $k7 on GNU/Linux.
diff --git a/gdb/doc/gdb.texinfo b/gdb/doc/gdb.texinfo
index 7dc1564..a70e71a 100644
--- a/gdb/doc/gdb.texinfo
+++ b/gdb/doc/gdb.texinfo
@@ -39041,6 +39041,40 @@ Memory Protection Extension (MPX).  It should describe the following registers:
 The @samp{org.gnu.gdb.i386.linux} feature is optional.  It should
 describe a single register, @samp{orig_eax}.
 
+The @samp{org.gnu.gdb.i386.avx512} feature is optional and requires the
+@samp{org.gnu.gdb.i386.avx} feature.  It should
+describe additional @sc{xmm} registers:
+
+@itemize @minus
+@item
+@samp{xmm16h} through @samp{xmm31h} for amd64
+@end itemize
+
+It should describe the upper 128 bits of additional @sc{ymm} registers:
+
+@itemize @minus
+@item
+@samp{ymm16h} through @samp{ymm31h} for amd64
+@end itemize
+
+It should
+describe the upper 256 bits of @sc{zmm} registers:
+
+@itemize @minus
+@item
+@samp{zmm0h} through @samp{zmm7h} for i386
+@item
+@samp{zmm0h} through @samp{zmm15h} for amd64
+@end itemize
+
+It should
+describe the additional @sc{zmm} registers:
+
+@itemize @minus
+@item
+@samp{zmm16h} through @samp{zmm31h} for amd64
+@end itemize
+
 @node MIPS Features
 @subsection @acronym{MIPS} Features
 @cindex target descriptions, @acronym{MIPS} features
-- 
1.8.4.2