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RE: [RFA 3/5] New port: CR16: gdb port
- From: Kaushik Phatak <Kaushik dot Phatak at kpitcummins dot com>
- To: Pedro Alves <palves at redhat dot com>
- Cc: "gdb-patches at sourceware dot org" <gdb-patches at sourceware dot org>, Joel Brobecker <brobecker at adacore dot com>
- Date: Wed, 26 Jun 2013 07:02:05 +0000
- Subject: RE: [RFA 3/5] New port: CR16: gdb port
- References: <20121022224107 dot GB3713 at adacore dot com> <C6CA53A2A46BA7469348BDBD663AB65845B3E44A at KCHJEXMB02 dot kpit dot com> <20121023135502 dot GA3555 at adacore dot com> <C6CA53A2A46BA7469348BDBD663AB65845B3EB9E at KCHJEXMB02 dot kpit dot com> <20121115174313 dot GC3790 at adacore dot com> <C6CA53A2A46BA7469348BDBD663AB65845B614E5 at KCHJEXMB02 dot kpit dot com> <20121122175010 dot GG9964 at adacore dot com> <C6CA53A2A46BA7469348BDBD663AB65848567829 at KCHJEXMB02 dot kpit dot com> <20130117085919 dot GA3564 at adacore dot com> <C6CA53A2A46BA7469348BDBD663AB65848569146 at KCHJEXMB02 dot kpit dot com> <20130118141649 dot GK3564 at adacore dot com> <C6CA53A2A46BA7469348BDBD663AB65848577561 at KCHJEXMB02 dot kpit dot com> <50FEABC8 dot 2040805 at redhat dot com> <C6CA53A2A46BA7469348BDBD663AB65848578A0D at KCHJEXMB02 dot kpit dot com> <510002E0 dot 7070806 at redhat dot com> <C6CA53A2A46BA7469348BDBD663AB6585308FA27 at KCHJEXMB02 dot kpit dot com> <51C9E479 dot 8090709 at redhat dot com>
Hi Pedro,
Thanks for another round of detailed review.
>> Hmm. Just to be clear, isn't exposing r0_orig to gDB necessary for
>> syscall restarting, like orig_eax/orig_rax on x86/x86_64, orig_r3 on ppc,
>> orig_r2 on s390, etc.? See e.g., i386_linux_write_pc, amd64_linux_write_pc,
>> ppc_linux_write_pc, s390_write_pc.
The original PTRACE implementation disallowed write to orig_r0and1, however read
was permitted. We can implement this as suggested above, so user may write a -1 to
this register to prevent a SIGSEGV or SIGILL similar to amd64_linux_write_pc.
The signal handler checks for "regs->orig_r0and1 >= 0" before performing a -ERESTARTSYS
I will add this register to linux-tdep in gdb as well as the gdbserver port, ok?
>> Are these always present in all versions of CR16 silicon? IOW, are
>> we safe with adding them to the core register set (*)?
>> (*) which registers are those btw? I'm not that familiar with CR16. :-)
The following 5 registers have been added to this patch, which are debug registers,
"dbs","dcrl","dsr","car0","car1"
These registers are not part of every silicon and can be an optional feature.
However, the current simulator port seems to support these by default.
>> you should really split them to a separate target description feature.
Is there any other port i can refer for this?
I will run through my code again and work on the other formatting related comments
provided.
Thanks,
Kaushik