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[PATCH] sim: bfin: fix typo in BF54x SIC init
- From: Mike Frysinger <vapier at gentoo dot org>
- To: gdb-patches at sourceware dot org
- Date: Sat, 31 Mar 2012 14:47:47 -0400
- Subject: [PATCH] sim: bfin: fix typo in BF54x SIC init
The current code triggers a warning:
dv-bfin_sic.c: In function 'bfin_sic_finish':
dv-bfin_sic.c:930:41: warning: operation on 'sic-><U78e8>.bf54x.iwr1'
may be undefined [-Wsequence-point]
This points out the IWR2 register was not being setup because of a typo.
Committed.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2012-03-31 Mike Frysinger <vapier@gentoo.org>
* dv-bfin_sic.c (bfin_sic_finish): Change iwr1 to iwr2.
---
sim/bfin/dv-bfin_sic.c | 2 +-
1 files changed, 1 insertions(+), 1 deletions(-)
diff --git a/sim/bfin/dv-bfin_sic.c b/sim/bfin/dv-bfin_sic.c
index fb48c36..b1438a3 100644
--- a/sim/bfin/dv-bfin_sic.c
+++ b/sim/bfin/dv-bfin_sic.c
@@ -927,7 +927,7 @@ bfin_sic_finish (struct hw *me)
/* Initialize the SIC. */
sic->bf54x.imask0 = sic->bf54x.imask1 = sic->bf54x.imask2 = 0;
sic->bf54x.isr0 = sic->bf54x.isr1 = sic->bf54x.isr2 = 0;
- sic->bf54x.iwr0 = sic->bf54x.iwr1 = sic->bf54x.iwr1 = 0xFFFFFFFF;
+ sic->bf54x.iwr0 = sic->bf54x.iwr1 = sic->bf54x.iwr2 = 0xFFFFFFFF;
sic->bf54x.iar0 = 0x10000000;
sic->bf54x.iar1 = 0x33322221;
sic->bf54x.iar2 = 0x66655444;
--
1.7.8.5