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Re: [RFC] mips-tdep.c: Ignore use of sw after sd in prologue scanner
On Thu, 6 Mar 2008 17:40:40 -0500
Daniel Jacobowitz <drow@false.org> wrote:
> Seems reasonable enough. Making it ABI-regsize-dependent would make
> sense too.
Thanks for looking it over.
I decided that I liked the "ABI-regsize-dependent" approach better than
my original patch. Here is what I've committed:
* mips-tdep.c (mips32_scan_prologue): Use the ABI register size
to decide whether to match instruction patterns using "sw" and "sd".
Index: mips-tdep.c
===================================================================
RCS file: /cvs/src/src/gdb/mips-tdep.c,v
retrieving revision 1.470
diff -u -p -r1.470 mips-tdep.c
--- mips-tdep.c 13 Mar 2008 12:22:13 -0000 1.470
+++ mips-tdep.c 14 Mar 2008 23:55:32 -0000
@@ -1931,6 +1931,7 @@ mips32_scan_prologue (CORE_ADDR start_pc
int seen_sp_adjust = 0;
int load_immediate_bytes = 0;
struct gdbarch *gdbarch = get_frame_arch (next_frame);
+ int regsize_is_64_bits = (mips_abi_regsize (gdbarch) == 8);
/* Can be called when there's no process, and hence when there's no
NEXT_FRAME. */
@@ -1973,11 +1974,13 @@ restart:
break;
seen_sp_adjust = 1;
}
- else if ((high_word & 0xFFE0) == 0xafa0) /* sw reg,offset($sp) */
+ else if (((high_word & 0xFFE0) == 0xafa0) /* sw reg,offset($sp) */
+ && !regsize_is_64_bits)
{
set_reg_offset (this_cache, reg, sp + low_word);
}
- else if ((high_word & 0xFFE0) == 0xffa0) /* sd reg,offset($sp) */
+ else if (((high_word & 0xFFE0) == 0xffa0) /* sd reg,offset($sp) */
+ && regsize_is_64_bits)
{
/* Irix 6.2 N32 ABI uses sd instructions for saving $gp and $ra. */
set_reg_offset (this_cache, reg, sp + low_word);
@@ -2041,7 +2044,8 @@ restart:
}
}
}
- else if ((high_word & 0xFFE0) == 0xafc0) /* sw reg,offset($30) */
+ else if ((high_word & 0xFFE0) == 0xafc0 /* sw reg,offset($30) */
+ && !regsize_is_64_bits)
{
set_reg_offset (this_cache, reg, frame_addr + low_word);
}