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[patch] Random whitespace / comment tweaks
- From: Michael Snyder <msnyder at redhat dot com>
- To: gdb-patches at sources dot redhat dot com
- Date: Thu, 09 Oct 2003 17:26:37 -0700
- Subject: [patch] Random whitespace / comment tweaks
- Organization: Red Hat, Inc.
Something sitting around in my tree...
2003-10-09 Michael Snyder <msnyder@redhat.com>
* d10v-tdep.c: Random whitespace/comment tweaks.
Index: d10v-tdep.c
===================================================================
RCS file: /cvs/src/src/gdb/d10v-tdep.c,v
retrieving revision 1.132
diff -p -r1.132 d10v-tdep.c
*** d10v-tdep.c 28 Sep 2003 22:32:19 -0000 1.132
--- d10v-tdep.c 10 Oct 2003 00:24:23 -0000
*************** struct gdbarch_tdep
*** 57,63 ****
};
/* These are the addresses the D10V-EVA board maps data and
! instruction memory to. */
enum memspace {
DMEM_START = 0x2000000,
--- 57,63 ----
};
/* These are the addresses the D10V-EVA board maps data and
! instruction memory to. */
enum memspace {
DMEM_START = 0x2000000,
*************** enum memspace {
*** 65,71 ****
STACK_START = 0x200bffe
};
! /* d10v register names. */
enum
{
--- 65,71 ----
STACK_START = 0x200bffe
};
! /* d10v register names. */
enum
{
*************** enum
*** 80,86 ****
NR_A_REGS = 2,
TS2_NUM_REGS = 37,
TS3_NUM_REGS = 42,
! /* d10v calling convention. */
ARG1_REGNUM = R0_REGNUM,
ARGN_REGNUM = R3_REGNUM,
RET1_REGNUM = R0_REGNUM,
--- 80,86 ----
NR_A_REGS = 2,
TS2_NUM_REGS = 37,
TS3_NUM_REGS = 42,
! /* d10v calling convention. */
ARG1_REGNUM = R0_REGNUM,
ARGN_REGNUM = R3_REGNUM,
RET1_REGNUM = R0_REGNUM,
*************** d10v_frame_align (struct gdbarch *gdbarc
*** 119,125 ****
and TYPE is the type (which is known to be struct, union or array).
The d10v returns anything less than 8 bytes in size in
! registers. */
static int
d10v_use_struct_convention (int gcc_p, struct type *type)
--- 119,125 ----
and TYPE is the type (which is known to be struct, union or array).
The d10v returns anything less than 8 bytes in size in
! registers. */
static int
d10v_use_struct_convention (int gcc_p, struct type *type)
*************** d10v_use_struct_convention (int gcc_p, s
*** 127,151 ****
long alignment;
int i;
/* The d10v only passes a struct in a register when that structure
! has an alignment that matches the size of a register. */
/* If the structure doesn't fit in 4 registers, put it on the
! stack. */
if (TYPE_LENGTH (type) > 8)
return 1;
/* If the struct contains only one field, don't put it on the stack
! - gcc can fit it in one or more registers. */
if (TYPE_NFIELDS (type) == 1)
return 0;
alignment = TYPE_LENGTH (TYPE_FIELD_TYPE (type, 0));
for (i = 1; i < TYPE_NFIELDS (type); i++)
{
/* If the alignment changes, just assume it goes on the
! stack. */
if (TYPE_LENGTH (TYPE_FIELD_TYPE (type, i)) != alignment)
return 1;
}
/* If the alignment is suitable for the d10v's 16 bit registers,
! don't put it on the stack. */
if (alignment == 2 || alignment == 4)
return 0;
return 1;
--- 127,151 ----
long alignment;
int i;
/* The d10v only passes a struct in a register when that structure
! has an alignment that matches the size of a register. */
/* If the structure doesn't fit in 4 registers, put it on the
! stack. */
if (TYPE_LENGTH (type) > 8)
return 1;
/* If the struct contains only one field, don't put it on the stack
! - gcc can fit it in one or more registers. */
if (TYPE_NFIELDS (type) == 1)
return 0;
alignment = TYPE_LENGTH (TYPE_FIELD_TYPE (type, 0));
for (i = 1; i < TYPE_NFIELDS (type); i++)
{
/* If the alignment changes, just assume it goes on the
! stack. */
if (TYPE_LENGTH (TYPE_FIELD_TYPE (type, i)) != alignment)
return 1;
}
/* If the alignment is suitable for the d10v's 16 bit registers,
! don't put it on the stack. */
if (alignment == 2 || alignment == 4)
return 0;
return 1;
*************** d10v_breakpoint_from_pc (CORE_ADDR *pcpt
*** 162,168 ****
}
/* Map the REG_NR onto an ascii name. Return NULL or an empty string
! when the reg_nr isn't valid. */
enum ts2_regnums
{
--- 162,168 ----
}
/* Map the REG_NR onto an ascii name. Return NULL or an empty string
! when the reg_nr isn't valid. */
enum ts2_regnums
{
*************** d10v_ts3_imap_register (void *regcache,
*** 279,285 ****
/* MAP GDB's internal register numbering (determined by the layout
from the DEPRECATED_REGISTER_BYTE array) onto the simulator's
! register numbering. */
static int
d10v_ts2_register_sim_regno (int nr)
--- 279,285 ----
/* MAP GDB's internal register numbering (determined by the layout
from the DEPRECATED_REGISTER_BYTE array) onto the simulator's
! register numbering. */
static int
d10v_ts2_register_sim_regno (int nr)
*************** static CORE_ADDR
*** 353,359 ****
d10v_make_iaddr (CORE_ADDR x)
{
if (d10v_iaddr_p (x))
! return x; /* Idempotency -- x is already in the IMEM space. */
else
return (((x) << 2) | IMEM_START);
}
--- 353,359 ----
d10v_make_iaddr (CORE_ADDR x)
{
if (d10v_iaddr_p (x))
! return x; /* Idempotency -- x is already in the IMEM space. */
else
return (((x) << 2) | IMEM_START);
}
*************** d10v_skip_prologue (CORE_ADDR pc)
*** 505,512 ****
CORE_ADDR func_addr, func_end;
struct symtab_and_line sal;
! /* If we have line debugging information, then the end of the */
! /* prologue should the first assembly instruction of the first source line */
if (find_pc_partial_function (pc, NULL, &func_addr, &func_end))
{
sal = find_pc_line (func_addr, 0);
--- 505,512 ----
CORE_ADDR func_addr, func_end;
struct symtab_and_line sal;
! /* If we have line debugging information, then the end of the prologue
! should the first assembly instruction of the first source line */
if (find_pc_partial_function (pc, NULL, &func_addr, &func_end))
{
sal = find_pc_line (func_addr, 0);
*************** d10v_skip_prologue (CORE_ADDR pc)
*** 515,521 ****
}
if (target_read_memory (pc, (char *) &op, 4))
! return pc; /* Can't access it -- assume no prologue. */
while (1)
{
--- 515,521 ----
}
if (target_read_memory (pc, (char *) &op, 4))
! return pc; /* Can't access it -- assume no prologue. */
while (1)
{
*************** d10v_skip_prologue (CORE_ADDR pc)
*** 545,552 ****
{
if (!check_prologue (op2))
{
! /* if the previous opcode was really part of the prologue */
! /* and not just a NOP, then we want to break after both instructions */
if (op1 != 0x5E00)
pc += 4;
break;
--- 545,553 ----
{
if (!check_prologue (op2))
{
! /* If the previous opcode was really part of the
! prologue and not just a NOP, then we want to
! break after both instructions. */
if (op1 != 0x5E00)
pc += 4;
break;
*************** prologue_find_regs (struct d10v_unwind_c
*** 657,663 ****
the saved registers of frame described by FRAME_INFO. This
includes special registers such as pc and fp saved in special ways
in the stack frame. sp is even more special: the address we return
! for it IS the sp for the next frame. */
static struct d10v_unwind_cache *
d10v_frame_unwind_cache (struct frame_info *next_frame,
--- 658,664 ----
the saved registers of frame described by FRAME_INFO. This
includes special registers such as pc and fp saved in special ways
in the stack frame. sp is even more special: the address we return
! for it IS the sp for the next frame. */
static struct d10v_unwind_cache *
d10v_frame_unwind_cache (struct frame_info *next_frame,
*************** d10v_unwind_sp (struct gdbarch *gdbarch,
*** 908,914 ****
}
/* When arguments must be pushed onto the stack, they go on in reverse
! order. The below implements a FILO (stack) to do this. */
struct stack_item
{
--- 909,915 ----
}
/* When arguments must be pushed onto the stack, they go on in reverse
! order. The below implements a FILO (stack) to do this. */
struct stack_item
{
*************** d10v_push_dummy_code (struct gdbarch *gd
*** 965,972 ****
static CORE_ADDR
d10v_push_dummy_call (struct gdbarch *gdbarch, CORE_ADDR func_addr,
struct regcache *regcache, CORE_ADDR bp_addr,
! int nargs, struct value **args, CORE_ADDR sp, int struct_return,
! CORE_ADDR struct_addr)
{
int i;
int regnum = ARG1_REGNUM;
--- 966,973 ----
static CORE_ADDR
d10v_push_dummy_call (struct gdbarch *gdbarch, CORE_ADDR func_addr,
struct regcache *regcache, CORE_ADDR bp_addr,
! int nargs, struct value **args, CORE_ADDR sp,
! int struct_return, CORE_ADDR struct_addr)
{
int i;
int regnum = ARG1_REGNUM;
*************** d10v_extract_return_value (struct type *
*** 1063,1069 ****
least significant part of the first register. The
remaining bytes in remaining registers. Interestingly, when
such values are passed in, the last byte is in the most
! significant byte of that same register - wierd. */
int reg = RET1_REGNUM;
int off = 0;
if (TYPE_LENGTH (type) & 1)
--- 1064,1070 ----
least significant part of the first register. The
remaining bytes in remaining registers. Interestingly, when
such values are passed in, the last byte is in the most
! significant byte of that same register - wierd. */
int reg = RET1_REGNUM;
int off = 0;
if (TYPE_LENGTH (type) & 1)
*************** d10v_extract_return_value (struct type *
*** 1086,1092 ****
understands. Returns number of bytes that can be transfered
starting at TARG_ADDR. Return ZERO if no bytes can be transfered
(segmentation fault). Since the simulator knows all about how the
! VM system works, we just call that to do the translation. */
static void
remote_d10v_translate_xfer_address (struct gdbarch *gdbarch,
--- 1087,1093 ----
understands. Returns number of bytes that can be transfered
starting at TARG_ADDR. Return ZERO if no bytes can be transfered
(segmentation fault). Since the simulator knows all about how the
! VM system works, we just call that to do the translation. */
static void
remote_d10v_translate_xfer_address (struct gdbarch *gdbarch,
*************** tdisassemble_command (char *arg, int fro
*** 1313,1319 ****
}
}
! printf_filtered ("Dump of trace from %s to %s:\n", paddr_u (low), paddr_u (high));
display_trace (low, high);
--- 1314,1321 ----
}
}
! printf_filtered ("Dump of trace from %s to %s:\n",
! paddr_u (low), paddr_u (high));
display_trace (low, high);
*************** d10v_frame_this_id (struct frame_info *n
*** 1404,1410 ****
func = frame_func_unwind (next_frame);
/* This is meant to halt the backtrace at "_start". Make sure we
! don't halt it at a generic dummy frame. */
if (func <= IMEM_START || deprecated_inside_entry_file (func))
return;
--- 1406,1412 ----
func = frame_func_unwind (next_frame);
/* This is meant to halt the backtrace at "_start". Make sure we
! don't halt it at a generic dummy frame. */
if (func <= IMEM_START || deprecated_inside_entry_file (func))
return;
*************** d10v_gdbarch_init (struct gdbarch_info i
*** 1483,1495 ****
gdbarch_register_name_ftype *d10v_register_name;
gdbarch_register_sim_regno_ftype *d10v_register_sim_regno;
! /* Find a candidate among the list of pre-declared architectures. */
arches = gdbarch_list_lookup_by_info (arches, &info);
if (arches != NULL)
return arches->gdbarch;
/* None found, create a new architecture from the information
! provided. */
tdep = XMALLOC (struct gdbarch_tdep);
gdbarch = gdbarch_alloc (&info, tdep);
--- 1485,1497 ----
gdbarch_register_name_ftype *d10v_register_name;
gdbarch_register_sim_regno_ftype *d10v_register_sim_regno;
! /* Find a candidate among the list of pre-declared architectures. */
arches = gdbarch_list_lookup_by_info (arches, &info);
if (arches != NULL)
return arches->gdbarch;
/* None found, create a new architecture from the information
! provided. */
tdep = XMALLOC (struct gdbarch_tdep);
gdbarch = gdbarch_alloc (&info, tdep);
*************** d10v_gdbarch_init (struct gdbarch_info i
*** 1535,1541 ****
set_gdbarch_long_bit (gdbarch, 4 * TARGET_CHAR_BIT);
set_gdbarch_long_long_bit (gdbarch, 8 * TARGET_CHAR_BIT);
/* NOTE: The d10v as a 32 bit ``float'' and ``double''. ``long
! double'' is 64 bits. */
set_gdbarch_float_bit (gdbarch, 4 * TARGET_CHAR_BIT);
set_gdbarch_double_bit (gdbarch, 4 * TARGET_CHAR_BIT);
set_gdbarch_long_double_bit (gdbarch, 8 * TARGET_CHAR_BIT);
--- 1537,1543 ----
set_gdbarch_long_bit (gdbarch, 4 * TARGET_CHAR_BIT);
set_gdbarch_long_long_bit (gdbarch, 8 * TARGET_CHAR_BIT);
/* NOTE: The d10v as a 32 bit ``float'' and ``double''. ``long
! double'' is 64 bits. */
set_gdbarch_float_bit (gdbarch, 4 * TARGET_CHAR_BIT);
set_gdbarch_double_bit (gdbarch, 4 * TARGET_CHAR_BIT);
set_gdbarch_long_double_bit (gdbarch, 8 * TARGET_CHAR_BIT);
*************** d10v_gdbarch_init (struct gdbarch_info i
*** 1549,1555 ****
case BFD_ENDIAN_LITTLE:
set_gdbarch_float_format (gdbarch, &floatformat_ieee_single_little);
set_gdbarch_double_format (gdbarch, &floatformat_ieee_single_little);
! set_gdbarch_long_double_format (gdbarch, &floatformat_ieee_double_little);
break;
default:
internal_error (__FILE__, __LINE__,
--- 1551,1558 ----
case BFD_ENDIAN_LITTLE:
set_gdbarch_float_format (gdbarch, &floatformat_ieee_single_little);
set_gdbarch_double_format (gdbarch, &floatformat_ieee_single_little);
! set_gdbarch_long_double_format (gdbarch,
! &floatformat_ieee_double_little);
break;
default:
internal_error (__FILE__, __LINE__,
*************** d10v_gdbarch_init (struct gdbarch_info i
*** 1560,1566 ****
set_gdbarch_push_dummy_code (gdbarch, d10v_push_dummy_code);
set_gdbarch_push_dummy_call (gdbarch, d10v_push_dummy_call);
set_gdbarch_store_return_value (gdbarch, d10v_store_return_value);
! set_gdbarch_extract_struct_value_address (gdbarch, d10v_extract_struct_value_address);
set_gdbarch_use_struct_convention (gdbarch, d10v_use_struct_convention);
set_gdbarch_skip_prologue (gdbarch, d10v_skip_prologue);
--- 1563,1570 ----
set_gdbarch_push_dummy_code (gdbarch, d10v_push_dummy_code);
set_gdbarch_push_dummy_call (gdbarch, d10v_push_dummy_call);
set_gdbarch_store_return_value (gdbarch, d10v_store_return_value);
! set_gdbarch_extract_struct_value_address (gdbarch,
! d10v_extract_struct_value_address);
set_gdbarch_use_struct_convention (gdbarch, d10v_use_struct_convention);
set_gdbarch_skip_prologue (gdbarch, d10v_skip_prologue);
*************** d10v_gdbarch_init (struct gdbarch_info i
*** 1569,1578 ****
set_gdbarch_function_start_offset (gdbarch, 0);
set_gdbarch_breakpoint_from_pc (gdbarch, d10v_breakpoint_from_pc);
! set_gdbarch_remote_translate_xfer_address (gdbarch, remote_d10v_translate_xfer_address);
set_gdbarch_frame_args_skip (gdbarch, 0);
! set_gdbarch_frameless_function_invocation (gdbarch, frameless_look_for_prologue);
set_gdbarch_frame_align (gdbarch, d10v_frame_align);
--- 1573,1584 ----
set_gdbarch_function_start_offset (gdbarch, 0);
set_gdbarch_breakpoint_from_pc (gdbarch, d10v_breakpoint_from_pc);
! set_gdbarch_remote_translate_xfer_address (gdbarch,
! remote_d10v_translate_xfer_address);
set_gdbarch_frame_args_skip (gdbarch, 0);
! set_gdbarch_frameless_function_invocation (gdbarch,
! frameless_look_for_prologue);
set_gdbarch_frame_align (gdbarch, d10v_frame_align);
*************** _initialize_d10v_tdep (void)
*** 1604,1610 ****
target_resume_hook = d10v_eva_prepare_to_trace;
target_wait_loop_hook = d10v_eva_get_trace_data;
! deprecate_cmd (add_com ("regs", class_vars, show_regs, "Print all registers"),
"info registers");
add_com ("itrace", class_support, trace_command,
--- 1610,1617 ----
target_resume_hook = d10v_eva_prepare_to_trace;
target_wait_loop_hook = d10v_eva_get_trace_data;
! deprecate_cmd (add_com ("regs", class_vars, show_regs,
! "Print all registers"),
"info registers");
add_com ("itrace", class_support, trace_command,