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Re: [RFA] Basic structure to describe register formats
> On Fri, Feb 01, 2002 at 04:10:16PM -0500, Andrew Cagney wrote:
>
>> Almost approved, I've been pokeing at random targets that once worked
>> and they have now all been broken by multi-arch.
>>
>
>> >@@ -0,0 +1,28 @@
>> >+name:arm
>> >+resume:r11,sp,pc
>> >+4:r0
>> >+4:r1
>> >+4:r2
>
>>
>>
>> My only quarm is with this. It extends the G packet definition a little
>> - lines with a leading letter get ignored just like comments and blanks.
>> Correct?
>
>
> Do we even have such a definition? I didn't think we did yet.
We have what I posted a while back :-)
> If so, then yes, I think that's a good extension. Also I would commit
> it with the number in bits rather than bytes.
You mean - 32:r1?
I think the ``4'' indicates 4*2 hex digits. Digit pairs ordered either
big or little endian. Yes it could be bits, however, the value would
always need to be divisible by 8.
>> Any way I think EXPEDITE to better word for describing what is to be
>> done with those registers. SID uses that word to describe this exact
>> same list.
>
>
> That's a good word for what's going on here, I quite like it. OK with
> that change?
Yes.
done.
Andrew