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Patch for sim/common/cgen-par.[ch]
- To: gdb-patches at sourceware dot cygnus dot com
- Subject: Patch for sim/common/cgen-par.[ch]
- From: Dave Brolley <brolley at redhat dot com>
- Date: Wed, 08 Mar 2000 15:21:24 -0500
- Organization: Cygnus Solutions, a Red Hat Company
Hi,
I've attached a patch which adds sim_queue_fn_sf_write to the
existing functions for queuing writes of various modes (used for
simulation of parallel execution). It also fixes the type of the
last argument to sim_queue_fn_si_write.
I'm seeking approval for this patch. I also need someone to
commit it for me or write access to the CVS repository so I can
do it myself.
Thanks,
Dave
2000-03-08 Dave Brolley <brolley@redhat.com>
* cgen-par.h (cgen_write_queue_kind): Add CGEN_FN_SF_WRITE.
(CGEN_WRITE_QUEUE_ELEMENT): Add fn_sf_write.
(sim_queue_fn_si_write): Last argument is has type USI.
(sim_queue_fn_sf_write): New function.
* cgen-par.c (sim_queue_fn_si_write): Declare 'value' as USI.
(sim_queue_fn_sf_write): New function.
(cgen_write_queue_element_execute): Handle CGEN_FN_SF_WRITE.
Index: sim/common/cgen-par.c
===================================================================
RCS file: /cvs/cvsfiles/devo/sim/common/cgen-par.c,v
retrieving revision 1.10
diff -c -p -r1.10 cgen-par.c
*** cgen-par.c 2000/03/02 09:08:52 1.10
--- cgen-par.c 2000/03/08 17:05:39
*************** void sim_queue_fn_si_write (
*** 93,99 ****
SIM_CPU *cpu,
void (*write_function)(SIM_CPU *cpu, UINT, USI),
UINT regno,
! SI value
)
{
CGEN_WRITE_QUEUE *q = CPU_WRITE_QUEUE (cpu);
--- 93,99 ----
SIM_CPU *cpu,
void (*write_function)(SIM_CPU *cpu, UINT, USI),
UINT regno,
! USI value
)
{
CGEN_WRITE_QUEUE *q = CPU_WRITE_QUEUE (cpu);
*************** void sim_queue_fn_si_write (
*** 105,110 ****
--- 105,126 ----
element->kinds.fn_si_write.value = value;
}
+ void sim_queue_fn_sf_write (
+ SIM_CPU *cpu,
+ void (*write_function)(SIM_CPU *cpu, UINT, SF),
+ UINT regno,
+ SF value
+ )
+ {
+ CGEN_WRITE_QUEUE *q = CPU_WRITE_QUEUE (cpu);
+ CGEN_WRITE_QUEUE_ELEMENT *element = CGEN_WRITE_QUEUE_NEXT (q);
+ element->kind = CGEN_FN_SF_WRITE;
+ element->insn_address = CPU_PC_GET (cpu);
+ element->kinds.fn_sf_write.function = write_function;
+ element->kinds.fn_sf_write.regno = regno;
+ element->kinds.fn_sf_write.value = value;
+ }
+
void sim_queue_fn_di_write (
SIM_CPU *cpu,
void (*write_function)(SIM_CPU *cpu, UINT, DI),
*************** cgen_write_queue_element_execute (SIM_CP
*** 363,368 ****
--- 379,389 ----
item->kinds.fn_si_write.function (cpu,
item->kinds.fn_si_write.regno,
item->kinds.fn_si_write.value);
+ break;
+ case CGEN_FN_SF_WRITE:
+ item->kinds.fn_sf_write.function (cpu,
+ item->kinds.fn_sf_write.regno,
+ item->kinds.fn_sf_write.value);
break;
case CGEN_FN_DI_WRITE:
item->kinds.fn_di_write.function (cpu,
Index: sim/common/cgen-par.h
===================================================================
RCS file: /cvs/cvsfiles/devo/sim/common/cgen-par.h,v
retrieving revision 1.11
diff -c -p -r1.11 cgen-par.h
*** cgen-par.h 2000/03/02 09:08:53 1.11
--- cgen-par.h 2000/03/08 17:05:39
*************** with this program; if not, write to the
*** 25,31 ****
enum cgen_write_queue_kind {
CGEN_BI_WRITE, CGEN_QI_WRITE, CGEN_SI_WRITE, CGEN_SF_WRITE,
CGEN_PC_WRITE,
! CGEN_FN_HI_WRITE, CGEN_FN_SI_WRITE, CGEN_FN_DI_WRITE, CGEN_FN_DF_WRITE,
CGEN_FN_XI_WRITE, CGEN_FN_PC_WRITE,
CGEN_MEM_QI_WRITE, CGEN_MEM_HI_WRITE, CGEN_MEM_SI_WRITE, CGEN_MEM_DI_WRITE,
CGEN_MEM_DF_WRITE, CGEN_MEM_XI_WRITE,
--- 25,32 ----
enum cgen_write_queue_kind {
CGEN_BI_WRITE, CGEN_QI_WRITE, CGEN_SI_WRITE, CGEN_SF_WRITE,
CGEN_PC_WRITE,
! CGEN_FN_HI_WRITE, CGEN_FN_SI_WRITE, CGEN_FN_SF_WRITE,
! CGEN_FN_DI_WRITE, CGEN_FN_DF_WRITE,
CGEN_FN_XI_WRITE, CGEN_FN_PC_WRITE,
CGEN_MEM_QI_WRITE, CGEN_MEM_HI_WRITE, CGEN_MEM_SI_WRITE, CGEN_MEM_DI_WRITE,
CGEN_MEM_DF_WRITE, CGEN_MEM_XI_WRITE,
*************** typedef struct {
*** 70,75 ****
--- 71,81 ----
} fn_si_write;
struct {
UINT regno;
+ SF value;
+ void (*function)(SIM_CPU *, UINT, SF);
+ } fn_sf_write;
+ struct {
+ UINT regno;
DI value;
void (*function)(SIM_CPU *, UINT, DI);
} fn_di_write;
*************** extern void sim_queue_sf_write (SIM_CPU
*** 181,187 ****
extern void sim_queue_pc_write (SIM_CPU *, USI);
extern void sim_queue_fn_hi_write (SIM_CPU *, void (*)(SIM_CPU *, UINT, UHI), UINT, UHI);
! extern void sim_queue_fn_si_write (SIM_CPU *, void (*)(SIM_CPU *, UINT, USI), UINT, SI);
extern void sim_queue_fn_di_write (SIM_CPU *, void (*)(SIM_CPU *, UINT, DI), UINT, DI);
extern void sim_queue_fn_df_write (SIM_CPU *, void (*)(SIM_CPU *, UINT, DF), UINT, DF);
extern void sim_queue_fn_xi_write (SIM_CPU *, void (*)(SIM_CPU *, UINT, SI *), UINT, SI *);
--- 187,194 ----
extern void sim_queue_pc_write (SIM_CPU *, USI);
extern void sim_queue_fn_hi_write (SIM_CPU *, void (*)(SIM_CPU *, UINT, UHI), UINT, UHI);
! extern void sim_queue_fn_si_write (SIM_CPU *, void (*)(SIM_CPU *, UINT, USI), UINT, USI);
! extern void sim_queue_fn_sf_write (SIM_CPU *, void (*)(SIM_CPU *, UINT, SF), UINT, SF);
extern void sim_queue_fn_di_write (SIM_CPU *, void (*)(SIM_CPU *, UINT, DI), UINT, DI);
extern void sim_queue_fn_df_write (SIM_CPU *, void (*)(SIM_CPU *, UINT, DF), UINT, DF);
extern void sim_queue_fn_xi_write (SIM_CPU *, void (*)(SIM_CPU *, UINT, SI *), UINT, SI *);