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[PATCH] Minor change to gdb/doc/agentexpr.texi

I've just committed a minor change (see below) to gdb/doc/agentexpr.texi.

Intel does not want us to use "Merced" in the gdb documentation.  And
when referring to their next generation architecture, we must use
"IA-64".  No other variant is acceptable.

(Note to RedHat folks:  This change has been committed to the internal
repository as well.)

(Note to Stan: I hope it is okay for me to commit this sort of change
without your prior consent.  It is not my intent to step on your toes
or otherwise usurp your maintainership role for the documentation;  I
merely felt it was more expeditious since I was sure you would approve.
However, if there's anything you want changed, please let me know and
I'll make the appropriate adjustments so long as it also meets Intel's

One final note.  Since it was Jim Wilson who suggested the wording,
I'm going to amend my ChangeLog entry to note this fact.

Index: ChangeLog
RCS file: /cvs/src/src/gdb/doc/ChangeLog,v
retrieving revision
diff -u -r1.1.1.24 ChangeLog
--- ChangeLog	2000/02/07 00:19:39
+++ ChangeLog	2000/02/16 04:06:46
@@ -1,3 +1,8 @@
+2000-02-15  Kevin Buettner  <>
+	* agentexpr.texi: Fix wording regarding Intel's IA-64
+	architecture.
 2000-01-16  Tom Tromey  <>
 	* gdb.texinfo (Breakpoints): Mention breakpoint ranges.
Index: agentexpr.texi
RCS file: /cvs/src/src/gdb/doc/agentexpr.texi,v
retrieving revision
diff -u -r1.1.1.1 agentexpr.texi
--- agentexpr.texi	1999/04/16 01:34:07
+++ agentexpr.texi	2000/02/16 04:06:47
@@ -798,7 +798,7 @@
 @item Why does the @code{reg} bytecode take a 16-bit register number?
-Intel's IA64-architecture, Merced, has 128 general-purpose registers,
+Intel's IA-64 architecture has 128 general-purpose registers,
 and 128 floating-point registers, and I'm sure it has some random
 control registers.

Kevin Buettner,

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