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src/sim/bfin ChangeLog interp.c
- From: vapier at sourceware dot org
- To: gdb-cvs at sourceware dot org
- Date: 22 Jun 2011 04:21:29 -0000
- Subject: src/sim/bfin ChangeLog interp.c
CVSROOT: /cvs/src
Module name: src
Changes by: vapier@sourceware.org 2011-06-22 04:21:29
Modified files:
sim/bfin : ChangeLog interp.c
Log message:
sim: bfin: pass up result2/errcode with libgloss syscalls
Now that the Blackfin libgloss code extracts the 2nd result and the
error code from the R1/R2 registers, have the sim fill them up.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
Patches:
http://sourceware.org/cgi-bin/cvsweb.cgi/src/sim/bfin/ChangeLog.diff?cvsroot=src&r1=1.59&r2=1.60
http://sourceware.org/cgi-bin/cvsweb.cgi/src/sim/bfin/interp.c.diff?cvsroot=src&r1=1.3&r2=1.4