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Re: SMP on Intel x86
"Steve West" <firstname.lastname@example.org> writes:
> > Of course it can probably be fixed, but that is several weeks work.
> > There is also a question of suitability. eCos is intended for small,
> > cheap, low power embedded devices. Anything with a Core 2 duo in it
> > will have plenty of RAM, peripherals, graphics, and high power
> > consumption. Most likely a PC motherboard. It would make more sense to
> > run an embedded Linux on that than put the effort in to getting eCos
> > running.
> We have been using eCos since 2002. There was little for embedded OS's
> that where as powerful as eCos back then. We would like to continue to
> use it, but may be forced to an embedded Linux as the hardware changes
> are forcing us to a dual CPU.
> We would like to test the SMP on eCos. For now we can just get the
> info from the ACPI table by hand and try the code. I have been doing
> some investigation and find that setting the interrupt and starting
> the CPU may be different now. Could you shed some light on this?
I'm afraid my knowledge of x86 SMP hardware is very rusty, and I
haven't looked at it for ages. I would hope that the mechanism for
getting secondary CPUs running is better than it was before, it was a
somewhat weird process when I did it.
I'm afraid you will have to work this out for yourself. The first step
is to get the necessary documentation, probably from Intel's
website. For example code take a look at the Linux kernel, that was my
main source of information on the details. Of course if you intend to
link proprietary code with it, or contribute it back, don't copy any
of the Linux code.
Sorry I cannot be more help.
Nick Garnett eCos Kernel Architect
eCosCentric Limited http://www.eCosCentric.com The eCos experts
Barnwell House, Barnwell Drive, Cambridge, UK. Tel: +44 1223 245571
Registered in England and Wales: Reg No: 4422071
>>>> Visit us on stand 905 at the Embedded Systems Show 2008 <<<<
>>>> Oct 1-2, NEC, Birmingham, UK http://www.embedded.co.uk <<<<
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