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Re: Cortex M3 architecture

> No I haven't really. All I know is that the variants all have very  
> different application profiles. A series being mostly for complex OS and  
> applications, R series for more complex embedded applications and the M  
> series for deeply embedded applications. A & R also support normal Thumb  
> and ARM instructions. Perhaps someone else can give some insight?

I was just skimming through the ARM website. 

The M1 and M3 only supports thumb2. They have a complete different
interrupt controller, the NVIC. They only have two operating modes,
unlike the old processors which has 7 modes. I could not find much
documentation about the M1. It is designed to be used on FPGA, so i
guess you can synthesis it. That probably means you can leave bits of
it out, extend it etc. However it looks like it supports the NVIC as
well. The NVIC also gives you your system tick, which is nice.

I would agree that a new architecture port is the way to go. The
Cortex M? is just too different. I also think you can safely ignore
the A and R processors. However i think you should try to include both
M1 and M3 in your architecture package, if possible.


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