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Software I2C
- From: "Slawek" <sgp at telsatgp dot com dot pl>
- To: <ecos-discuss at sources dot redhat dot com>
- Date: Mon, 7 Jul 2003 10:45:45 +0200
- Subject: [ECOS] Software I2C
Hello,
I'm going to implement I2C master support in software.
I don't like the idea of tight-loop style delays.
Is there any good way to receive relatively high frequency interrupt in eCos?
Something between 100kHz and 200kHz.
What are the main do's and dont's when configuring such an interrupt?
Can I setup eCos to have less interrupt overhead in some way?
My interrupt routine will not have to use any kernel operations in most cases so ISR will be OK most of the times.
Although ISR does have an overhead from eCos as well. How can I minimize that?
Is it possible to not use eCos there at all? Will I need to invoke an eCos interrupt entry / leave routines by hand then (in those cases when I do need to signal a semaphore in DSR)? How to do that?
Are there any documentation or examples available?
It would be best if you could direct me to source code that is already using such techniques.
--
Slawek Piotrowski
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