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RE: makefile syntax %.d:%.c misunderstood

Firstly, i thank Dave K. for helping me.
I don't understand all functionnalities of VPATH, but i think that i don't
used it.
You can find below a minimal test case that demonstrates the problem.
I wish to make it clear that directories name with letter '_' seem maybe to
be the source of problem !
You can find sources files below.

Directory tree is :
      +-- ver_100
             +---- c : files root.c and foo.c
             +---- s : file init.S
             +---- compiler : file makefile
                      +---- obj

root.c :
  extern int foo(void);
  int root(void);
  /* root function */
  int root(void)
 	int i=0, j;
	while(1) {
		j = foo();

foo.c :
   /* foo function */
  int foo(void) {

init.S :
   .globl	_start
   /* Call C function */
   bl      root

makefile :

#	Compiler selection
PROC			=	powerpc
TYPE			=	eabi
GCC_VER			=	3.3.2
COMPILER_DIR	=	/opt/crosstool/$(PROC)-$(TYPE)/gcc-$(GCC_VER)
PATH			=	$(COMPILER_DIR)/bin:/usr/bin:.:$(PATH_TMP)
CC				=	$(PROC)-$(TYPE)-gcc
LD				=	$(PROC)-$(TYPE)-ld
SHELL			=	/bin/sh

#	Files list
SRC_APP_S	= ../s/init.S
SRC_APP_C	= ../c/root.c ../c/foo.c

#	Listing of all source files
SRC_DEP		= $(SRC_APP_S:.S=.d) $(SRC_APP_C:.c=.d)
SRC_OBJ		= $(foreach file,$(SRC_DEP), obj/$(notdir $(file:.d=.o)) )

#	Linker command name
LDFLAGS     = -g --cref -lgcc -Lobj

# Check if dependencies are correct
EXTERNAL_FILES_D = $(strip $(sort $(wildcard obj/*.d)))
INTERNAL_FILES_D = $(strip $(sort $(SRC_OBJ:.o=.d)))

all: test_pb_path.elf

test_pb_path.elf: $(SRC_OBJ)
	@echo 'Linking $@'
	@$(LD) -g -o obj/test.elf $(SRC_OBJ)

# includes all dependency files
include obj/*.d

else	# else => dependencies are not correct

recover_dep: clean_all $(SRC_DEP)


clean_all cl:
	@-/bin/rm -f obj/*.*

#	Create a file.d for each file.c which contains dependencies!
	@echo 'Make dependencies of $<'
	@$(CC) -MM $(@:.d=.c) | sed -u s/'$(notdir $(@:.d=.o)):'/'obj\/$(notdir
$(@:.d=.o)):'/g > obj/$(notdir $@)
	@echo '	@echo Building $$@' >> obj/$(notdir $@)
	@echo '	@$$(CC) -c $$< $$(CFLAGS) -o $$@' >> obj/$(notdir $@)

	@echo 'Make dependencies of $<'
	@$(CC) -MM $(@:.d=.S) | sed -u s/'$(notdir $(@:.d=.o)):'/'obj\/$(notdir
$(@:.d=.o)):'/g > obj/$(notdir $@)
	@echo '	@echo Building $$@' >> obj/$(notdir $@)
	@echo '	@$$(CC) -c $$< $$(ASFLAGS) -o $$@' >> obj/$(notdir $@)


> -----Original Message-----
> From: cygwin-owner On Behalf Of Sébastien Douheret
> Sent: 07 June 2004 17:37
> To: cygwin
> Subject: makefile syntax %.d:%.c misunderstood
> 	Hi,
> i have a strongly problem with make under cygwin !
> Make don't understand this syntax %.d:%.c of my makefile.

  Then you've typed something wrong.  Cygwin make has no problem with that
format.  I use it all the time successfully.

> If sources files are on my local drive (eg. :
> "c:\dev\sources"), make is
> successful, but if my sources files are on network drive
> mounted as /f, an
> error occurs during compilation :
> 	make: *** No rule to make target `../c/boardboot.d',
> needed by `make_dep'.
> Stop.
> Is it a problem of mount ?

  Most likely something's wrong in your makefile.  Are you using a hardcoded
VPATH that makes it work on your C drive but not any other?  Can you strip
down your makefile to a minimal test case that demonstrates the problem
using just a single .c file and %.d:%.c rule?


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