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Re: Disable SPE instructions for MPC85xx (e500)


Sébastien Douheret wrote:
I have generate a crosscompiler to target a PowerQuicc3 (MPC85xx with a core
e500) with these flags :

export TARGET=powerpc-eabispe
export TARGET_CFLAGS="-O -msoft-float -mno-string -Wa,-me500"
export NEWLIB_DIR=newlib-1.12.0
export NEWLIB_URL=ftp://sources.redhat.com/pub/newlib
export NEWLIB_EXTRA_CONFIG="--without-fp"

export GCC_LANGUAGES="c,c++"

export BINUTILS_DIR=binutils-2.14
export BINUTILS_URL=ftp://gcc.gnu.org/pub/binutils/releases/

export GCC_DIR=gcc-3.3.2
export GCC_EXTRA_CONFIG=""

Ah, are you using the newlib-patched crosstool?


Motorola advise against using SPE instructions for MPC85xx (see extract
below).
My compiler produce instruction in entry C function like "vmhraddshs
v31,v1,v4,v12" that require SPE functionnalities !

How can i disable it ?
With CFLAGS modification of makefile that generate crosscompiler or with
CFLAGS modification of makefile of my project ?
I have try -mno-altivec or -mabi=no-spe option without successful ;-(

... Extract of MPC8560TS/D(Rev. 1.0, 8/2003) :
NOTE
The e500 definition includes additional signal processing engine (SPE)
computational instructions that use the 64-bit GPRs. These are not
supported on the MPC8540 or the MPC8560 and should not be used.

I dunno... you've read http://gcc.gnu.org/onlinedocs/gcc-3.4.0/gcc/RS-6000-and-PowerPC-Options.html more carefully than I have, I suspect!

How about putting together a minimal test case showing the -S output?
- Dan

--
My technical stuff: http://kegel.com
My politics: see http://www.misleader.org for examples of why I'm for regime change

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