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[PATCH 0/6] x86: introduce "templated" insn templates
- From: Jan Beulich <jbeulich at suse dot com>
- To: "binutils at sourceware dot org" <binutils at sourceware dot org>
- Cc: "H.J. Lu" <hjl dot tools at gmail dot com>
- Date: Fri, 6 Mar 2020 09:09:42 +0100
- Subject: [PATCH 0/6] x86: introduce "templated" insn templates
For a long time it has been bothering me that there are in part
_very_ large groups of insn templates differing in only very
small details. Such bears the risk of some of them going out of
sync in minor details, or some being actually omitted (see
patch 4 for an example of the latter). And of course the opcode
table as a whole becomes easier to read and maintain when there
are fewer almost identical lines (an example of this effect can
be observed in patch 2).
The approach chosen involves i386-gen to do the expansion of
the templates. I did consider alternatives:
But I decided that the chose approach is, at least as an initial
step, the most flexible and least clumsy one. Down the road I
may continue to think about deferring expansion to early runtime
of the assembler, when it populates the mnemonics hash table.
1: x86: allow opcode templates to be templated
2: x86-64: Intel64 adjustments for conditional jumps
3: x86: use template for SSE floating point comparison insns
4: x86: use template for AVX/AVX512 floating point comparison insns
5: x86: use template for XOP integer comparison, shift, and rotate insns
6: x86: use template for AVX512 integer comparison insns
Jan