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Re: [PATCH 1/9] x86: refine TPAUSE and UMWAIT
On 05.03.2020 15:04, H.J. Lu wrote:
> On Thu, Mar 5, 2020 at 12:08 AM Jan Beulich <jbeulich@suse.com> wrote:
>>
>> On 04.03.2020 12:44, H.J. Lu wrote:
>>> On Wed, Mar 4, 2020 at 3:40 AM Jan Beulich <jbeulich@suse.com> wrote:
>>>> On 04.03.2020 12:36, H.J. Lu wrote:
>>>>> On Wed, Mar 4, 2020 at 1:37 AM Jan Beulich <jbeulich@suse.com> wrote:
>>>>>> Allowing 64-bit registers is misleading here: Elsewhere these get allowed
>>>>>> when there's no difference between either variant, because of 32-bit
>>>>>> destination registers having their upper halves zeroed in 64-bit mode.
>>>>>> Here, however, they're source registers, and hence specifying 64-bit
>>>>>> registers would lead to the ambiguity of whether the upper 32 bits
>>>>>> actually matter.
>>>>>>
>>>>>> Additionally, for proper code generation in 16-bit mode, IgnoreSize is
>>>>>> needed on both.
>>>>>
>>>>> Are there testcases to show IgnoreSize is needed on them?
>>>>
>>>> The situation with 16-bit test cases is rather poor anyway. I didn't
>>>> consider it reasonable to add such very special ones when far more
>>>> general ones don't exist. But if your question is to mean you demand
>>>
>>> Let's start from somewhere.
>>>
>>>> such to be added, then I'll (somewhat hesitantly) add/extend some.
>>>> Please clarify.
>>>
>>> Please add testcases.
>>
>> Actually they were there, in patch 2. I've moved them to this patch
>> and have just sent v1.1 for just this one patch.
>
> Do we need to adjust disassembler for 16-bit mode?
I haven't checked, but (a) this would be an independent change
and (b) it would likely affect more than just the insns here
(see e.g. other parts of the series).
Jan