This is the mail archive of the
binutils@sourceware.org
mailing list for the binutils project.
Re: [PATCH] x86: Mark cvtpi2ps and cvtpi2pd as MMX
On 19.02.2020 15:23, H.J. Lu wrote:
> On Wed, Feb 19, 2020 at 6:19 AM Jan Beulich <jbeulich@suse.com> wrote:
>> On 19.02.2020 15:09, H.J. Lu wrote:
>>> On Wed, Feb 19, 2020 at 5:53 AM Jan Beulich <jbeulich@suse.com> wrote:
>>>> As per your suggested doc patch "pure SSE" means "not touching MMX
>>>> registers or state". This is the case for CVTPI2PD.
>>>
>>> I will exclude cvtpi2ps and cvtpi2pd explicitly.
>>
>> Okay, this would clarify what "pure SSE" means. My next objection
>> then is to make a connection between "pure SSE" and the feature
>> used property. There, as made pretty clear by my earlier inquiry
>> about the intentions of this feature tracking, things should be
>> really tied to hardware behavior. I.e. "not touching MMX registers
>> or state" ==> MMX feature not recorded as being used. No
>> exceptions for any insns.
>
> Intention is to treat cvtpi2ps and cvtpi2pd as MMX.
Well, I understand you want to special case these. But the model
behind the feature recording shouldn't require any (such) special
cases. To possible consumers of this information it doesn't matter
what exact insns are being used. Instead, affected machine state
is what counts. Hence the individual flags should be tied to the
machine state individual insns consume or touch, and at that point
no special cases like the ones you suggest are going to be needed
(special casing may still be needed when possibly the
consumed/touched machine state can't be inferred from other
information available, most notably the insn template and its
actual operands).
Jan