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Re: [PATCH] x86: accept SSE* insns accessing MMX registers with ".arch .nommx"
- From: "H.J. Lu" <hjl dot tools at gmail dot com>
- To: Jan Beulich <jbeulich at suse dot com>
- Cc: "binutils at sourceware dot org" <binutils at sourceware dot org>
- Date: Thu, 13 Feb 2020 03:43:49 -0800
- Subject: Re: [PATCH] x86: accept SSE* insns accessing MMX registers with ".arch .nommx"
- References: <bfe9b4d5-dbb3-8180-61b7-0fcbeb5e2158@suse.com>
On Thu, Feb 13, 2020 at 1:24 AM Jan Beulich <jbeulich@suse.com> wrote:
>
> These are regular SSE/SSE2 insns, and hence should be accepted
> irrespective of MMX as a feature being enabled. Since the MMX CPU
> feature is intentionally not implicitly enabled by ".arch .sse", MMX
This begs the question if ".arch .sse" should enable MMX.
> registers may be left unrecognized only when both MMX and SSE are
> disabled. The errors previously generated on most of these insns in this
> mode perhaps wasn't actually the biggest problem - in "noprefix" mode,
> mm<N> source operands would silently have been taken as memory operands
> of those names, i.e. wrong code was silently generated.
This is the real problem. What happens if YMM/ZMM are used with
AVX disabled?
> gas/
> 2020-02-XX Jan Beulich <jbeulich@suse.com>
>
> * config/tc-i386.c (parse_real_register): Accept MMX registers
> also when SSE is enabled.
> * testsuite/gas/i386/nommx-4.s, testsuite/gas/i386/nommx-4.l:
> New.
> * testsuite/gas/i386/i386.exp: Run new test.
>
--
H.J.